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Commit e2281080 authored by Sinan Kaya's avatar Sinan Kaya Committed by Bjorn Helgaas
Browse files

video: fbdev: riva: deprecate pci_get_bus_and_slot() 



pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.

Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().

struct riva_par has a pointer to struct pci_dev. Use the pci_dev member
to extract the domain information.

Change the function signature for CalcStateExt and RivaGetConfig to pass
in struct pci_dev in addition to RIVA_HW_INST so that code inside the
riva_hw.c can also calculate domain number and pass it to
pci_get_domain_bus_and_slot().

Signed-off-by: default avatarSinan Kaya <okaya@codeaurora.org>
Signed-off-by: default avatarBjorn Helgaas <helgaas@kernel.org>
Acked-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
parent 5ceae169

drivers/video/fbdev/riva/fbdev.c

+1 −1
Original line number Diff line number Diff line
@@ -780,7 +780,7 @@ static int riva_load_video_mode(struct fb_info *info) 
	else

		newmode.misc_output |= 0x80;	



	rc = CalcStateExt(&par->riva, &newmode.ext, bpp, width,

	rc = CalcStateExt(&par->riva, &newmode.ext, par->pdev, bpp, width,

			  hDisplaySize, height, dotClock);

	if (rc)

		goto out;

drivers/video/fbdev/riva/nv_driver.c

+4 −3
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ unsigned long riva_get_memlen(struct riva_par *par) 
	unsigned int chipset = par->Chipset;

	struct pci_dev* dev;

	u32 amt;

	int domain = pci_domain_nr(par->pdev->bus);



	switch (chip->Architecture) {

	case NV_ARCH_03:
@@ -226,12 +227,12 @@ unsigned long riva_get_memlen(struct riva_par *par) 
	case NV_ARCH_30:

		if(chipset == NV_CHIP_IGEFORCE2) {



			dev = pci_get_bus_and_slot(0, 1);

			dev = pci_get_domain_bus_and_slot(domain, 0, 1);

			pci_read_config_dword(dev, 0x7C, &amt);

			pci_dev_put(dev);

			memlen = (((amt >> 6) & 31) + 1) * 1024;

		} else if (chipset == NV_CHIP_0x01F0) {

			dev = pci_get_bus_and_slot(0, 1);

			dev = pci_get_domain_bus_and_slot(domain, 0, 1);

			pci_read_config_dword(dev, 0x84, &amt);

			pci_dev_put(dev);

			memlen = (((amt >> 4) & 127) + 1) * 1024;
@@ -417,6 +418,6 @@ riva_common_setup(struct riva_par *par) 
	}

	par->riva.flatPanel = (par->FlatPanel > 0) ? TRUE : FALSE;



	RivaGetConfig(&par->riva, par->Chipset);

	RivaGetConfig(&par->riva, par->pdev, par->Chipset);

}

drivers/video/fbdev/riva/riva_hw.c

+13 −7
Original line number Diff line number Diff line
@@ -1108,7 +1108,8 @@ static void nForceUpdateArbitrationSettings 
    unsigned      pixelDepth,

    unsigned     *burst,

    unsigned     *lwm,

    RIVA_HW_INST *chip

    RIVA_HW_INST *chip,

    struct pci_dev *pdev

)

{

    nv10_fifo_info fifo_data;
@@ -1116,8 +1117,9 @@ static void nForceUpdateArbitrationSettings 
    unsigned int M, N, P, pll, MClk, NVClk;

    unsigned int uMClkPostDiv;

    struct pci_dev *dev;

    int domain = pci_domain_nr(pdev->bus);



    dev = pci_get_bus_and_slot(0, 3);

    dev = pci_get_domain_bus_and_slot(domain, 0, 3);

    pci_read_config_dword(dev, 0x6C, &uMClkPostDiv);

    pci_dev_put(dev);

    uMClkPostDiv = (uMClkPostDiv >> 8) & 0xf;
@@ -1132,7 +1134,7 @@ static void nForceUpdateArbitrationSettings 
    sim_data.enable_video   = 0;

    sim_data.enable_mp      = 0;



    dev = pci_get_bus_and_slot(0, 1);

    dev = pci_get_domain_bus_and_slot(domain, 0, 1);

    pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);

    pci_dev_put(dev);

    sim_data.memory_type    = (sim_data.memory_type >> 12) & 1;
@@ -1234,6 +1236,7 @@ int CalcStateExt 
(

    RIVA_HW_INST  *chip,

    RIVA_HW_STATE *state,

    struct pci_dev *pdev,

    int            bpp,

    int            width,

    int            hDisplaySize,
@@ -1300,7 +1303,7 @@ int CalcStateExt 
                                          pixelDepth * 8,

                                         &(state->arbitration0),

                                         &(state->arbitration1),

                                          chip);

                                          chip, pdev);

            } else {

                nv10UpdateArbitrationSettings(VClk, 

                                          pixelDepth * 8,
@@ -2102,10 +2105,12 @@ static void nv4GetConfig 
static void nv10GetConfig

(

    RIVA_HW_INST *chip,

    struct pci_dev *pdev,

    unsigned int chipset

)

{

    struct pci_dev* dev;

    int domain = pci_domain_nr(pdev->bus);

    u32 amt;



#ifdef __BIG_ENDIAN
@@ -2118,12 +2123,12 @@ static void nv10GetConfig 
     * Fill in chip configuration.

     */

    if(chipset == NV_CHIP_IGEFORCE2) {

        dev = pci_get_bus_and_slot(0, 1);

        dev = pci_get_domain_bus_and_slot(domain, 0, 1);

        pci_read_config_dword(dev, 0x7C, &amt);

        pci_dev_put(dev);

        chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;

    } else if(chipset == NV_CHIP_0x01F0) {

        dev = pci_get_bus_and_slot(0, 1);

        dev = pci_get_domain_bus_and_slot(domain, 0, 1);

        pci_read_config_dword(dev, 0x84, &amt);

        pci_dev_put(dev);

        chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
@@ -2224,6 +2229,7 @@ static void nv10GetConfig 
int RivaGetConfig

(

    RIVA_HW_INST *chip,

    struct pci_dev *pdev,

    unsigned int chipset

)

{
@@ -2245,7 +2251,7 @@ int RivaGetConfig 
        case NV_ARCH_10:

        case NV_ARCH_20:

        case NV_ARCH_30:

            nv10GetConfig(chip, chipset);

            nv10GetConfig(chip, pdev, chipset);

            break;

        default:

            return (-1);

drivers/video/fbdev/riva/riva_hw.h

+2 −1
Original line number Diff line number Diff line
@@ -536,6 +536,7 @@ extern int CalcStateExt 
(

    RIVA_HW_INST  *chip,

    RIVA_HW_STATE *state,

    struct pci_dev *pdev,

    int            bpp,

    int            width,

    int            hDisplaySize,
@@ -546,7 +547,7 @@ extern int CalcStateExt 
/*

 * External routines.

 */

int RivaGetConfig(RIVA_HW_INST *, unsigned int);

int RivaGetConfig(RIVA_HW_INST *chip, struct pci_dev *pdev, unsigned int c);

/*

 * FIFO Free Count. Should attempt to yield processor if RIVA is busy.

 */