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Commit dfe11a11 authored by Ranjit Waghmode's avatar Ranjit Waghmode Committed by Mark Brown
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spi: Add support for Zynq Ultrascale+ MPSoC GQSPI controller



This patch adds support for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC

Signed-off-by: default avatarRanjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent fe8e48ad
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+6 −0
Original line number Diff line number Diff line
@@ -609,6 +609,12 @@ config SPI_XTENSA_XTFPGA
	  16 bit words in SPI mode 0, automatically asserting CS on transfer
	  start and deasserting on end.

config SPI_ZYNQMP_GQSPI
	tristate "Xilinx ZynqMP GQSPI controller"
	depends on SPI_MASTER
	help
	  Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.

config SPI_NUC900
	tristate "Nuvoton NUC900 series SPI"
	depends on ARCH_W90X900
+1 −0
Original line number Diff line number Diff line
@@ -89,3 +89,4 @@ obj-$(CONFIG_SPI_TXX9) += spi-txx9.o
obj-$(CONFIG_SPI_XCOMM)		+= spi-xcomm.o
obj-$(CONFIG_SPI_XILINX)		+= spi-xilinx.o
obj-$(CONFIG_SPI_XTENSA_XTFPGA)		+= spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI)		+= spi-zynqmp-gqspi.o
+1122 −0

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