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Commit df5f1361 authored by Huy Nguyen's avatar Huy Nguyen Committed by Saeed Mahameed
Browse files

net/mlx5: Add pbmc and pptb in the port_access_reg_cap_mask 



Add pbmc and pptb in the port_access_reg_cap_mask. These two
bits determine if device supports receive buffer configuration.

Signed-off-by: default avatarHuy Nguyen <huyn@mellanox.com>
Reviewed-by: default avatarParav Pandit <parav@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 2c81bfd5

include/linux/mlx5/device.h

+3 −0
Original line number Diff line number Diff line
@@ -1152,6 +1152,9 @@ enum mlx5_qcam_feature_groups { 
#define MLX5_CAP_PCAM_FEATURE(mdev, fld) \

	MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld)



#define MLX5_CAP_PCAM_REG(mdev, reg) \

	MLX5_GET(pcam_reg, (mdev)->caps.pcam, port_access_reg_cap_mask.regs_5000_to_507f.reg)



#define MLX5_CAP_MCAM_REG(mdev, reg) \

	MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg)

include/linux/mlx5/mlx5_ifc.h

+12 −0
Original line number Diff line number Diff line
@@ -8003,6 +8003,17 @@ struct mlx5_ifc_pcam_enhanced_features_bits { 
	u8         ppcnt_statistical_group[0x1];

};



struct mlx5_ifc_pcam_regs_5000_to_507f_bits {

	u8         port_access_reg_cap_mask_127_to_96[0x20];

	u8         port_access_reg_cap_mask_95_to_64[0x20];

	u8         port_access_reg_cap_mask_63_to_32[0x20];



	u8         port_access_reg_cap_mask_31_to_13[0x13];

	u8         pbmc[0x1];

	u8         pptb[0x1];

	u8         port_access_reg_cap_mask_10_to_0[0xb];

};



struct mlx5_ifc_pcam_reg_bits {

	u8         reserved_at_0[0x8];

	u8         feature_group[0x8];
@@ -8012,6 +8023,7 @@ struct mlx5_ifc_pcam_reg_bits { 
	u8         reserved_at_20[0x20];



	union {

		struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;

		u8         reserved_at_0[0x80];

	} port_access_reg_cap_mask;