Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit df2b2496 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: qcom: enable CX AOP regulator cooling device for LAGOON"

parents 0b6bb9ce e56b4afe
Loading
Loading
Loading
Loading
+7 −0
Original line number Diff line number Diff line
@@ -509,6 +509,13 @@
				<RPMH_REGULATOR_LEVEL_RETENTION>;
			qcom,min-dropout-voltage-level = <(-1)>;
		};

		cx_cdev: regulator-cdev {
			compatible = "qcom,rpmh-reg-cdev";
			mboxes = <&qmp_aop 0>;
			qcom,reg-resource-name = "cx";
			#cooling-cells = <2>;
		};
	};

	rpmh-regulator-msslvl {
+281 −0
Original line number Diff line number Diff line
#include <dt-bindings/thermal/thermal.h>

&cpufreq_hw {
	#address-cells = <1>;
	#size-cells = <1>;
	qcom,cpu-isolation {
		compatible = "qcom,cpu-isolate";
		cpu0_isolate: cpu0-isolate {
			qcom,cpu = <&CPU0>;
			#cooling-cells = <2>;
		};

		cpu1_isolate: cpu1-isolate {
			qcom,cpu = <&CPU1>;
			#cooling-cells = <2>;
		};

		cpu2_isolate: cpu2-isolate {
			qcom,cpu = <&CPU2>;
			#cooling-cells = <2>;
		};

		cpu3_isolate: cpu3-isolate {
			qcom,cpu = <&CPU3>;
			#cooling-cells = <2>;
		};

		cpu4_isolate: cpu4-isolate {
			qcom,cpu = <&CPU4>;
			#cooling-cells = <2>;
		};

		cpu5_isolate: cpu5-isolate {
			qcom,cpu = <&CPU5>;
			#cooling-cells = <2>;
		};

		cpu6_isolate: cpu6-isolate {
			qcom,cpu = <&CPU6>;
			#cooling-cells = <2>;
		};

		cpu7_isolate: cpu7-isolate {
			qcom,cpu = <&CPU7>;
			#cooling-cells = <2>;
		};
	};
};

&thermal_zones {
	aoss-0-usr {
		polling-delay-passive = <0>;
@@ -567,4 +614,238 @@
			};
		};
	};

	gpuss-max-step {
		polling-delay-passive = <10>;
		polling-delay = <100>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			gpu_trip0: gpu-trip0 {
				temperature = <95000>;
				hysteresis = <0>;
				type = "passive";
			};
		};
	};

	cpu-0-0-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&tsens0 1>;
		wake-capable-sensor;
		trips {
			cpu00_config: cpu00-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu00_cdev {
				trip = <&cpu00_config>;
				cooling-device = <&cpu0_isolate 1 1>;
			};
		};
	};

	cpu-0-1-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&tsens0 2>;
		wake-capable-sensor;
		trips {
			cpu01_config: cpu01-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu01_cdev {
				trip = <&cpu01_config>;
				cooling-device = <&cpu1_isolate 1 1>;
			};
		};
	};

	cpu-0-2-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&tsens0 3>;
		wake-capable-sensor;
		trips {
			cpu02_config: cpu02-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu02_cdev {
				trip = <&cpu02_config>;
				cooling-device = <&cpu2_isolate 1 1>;
			};
		};
	};

	cpu-0-3-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 4>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu03_config: cpu03-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu03_cdev {
				trip = <&cpu03_config>;
				cooling-device = <&cpu3_isolate 1 1>;
			};
		};
	};

	cpu-0-4-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 5>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu04_config: cpu04-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu04_cdev {
				trip = <&cpu04_config>;
				cooling-device = <&cpu4_isolate 1 1>;
			};
		};
	};

	cpu-0-5-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 6>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu05_config: cpu05-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu05_cdev {
				trip = <&cpu05_config>;
				cooling-device = <&cpu5_isolate 1 1>;
			};
		};
	};

	cpu-1-0-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 9>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu10_config: cpu10-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu10_cdev {
				trip = <&cpu10_config>;
				cooling-device = <&cpu6_isolate 1 1>;
			};
		};
	};

	cpu-1-1-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 10>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu11_config: cpu11-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu11_cdev {
				trip = <&cpu11_config>;
				cooling-device = <&cpu6_isolate 1 1>;
			};
		};
	};

	cpu-1-2-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 11>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu12_config: cpu12-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu12_cdev {
				trip = <&cpu12_config>;
				cooling-device = <&cpu7_isolate 1 1>;
			};
		};
	};

	cpu-1-3-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&tsens0 12>;
		thermal-governor = "step_wise";
		wake-capable-sensor;
		trips {
			cpu13_config: cpu13-config {
				temperature = <110000>;
				hysteresis = <10000>;
				type = "passive";
			};
		};

		cooling-maps {
			cpu13_cdev {
				trip = <&cpu13_config>;
				cooling-device = <&cpu7_isolate 1 1>;
			};
		};
	};
};
+3 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@
			qcom,freq-domain = <&cpufreq_hw 0 6>;
			cache-size = <0x8000>;
			next-level-cache = <&L2_0>;
			#cooling-cells = <2>;
			L2_0: l2-cache {
			      compatible = "arm,arch-cache";
			      cache-size = <0x10000>;
@@ -245,6 +246,7 @@
			qcom,freq-domain = <&cpufreq_hw 1 2>;
			cache-size = <0x10000>;
			next-level-cache = <&L2_600>;
			#cooling-cells = <2>;
			L2_600: l2-cache {
				compatible = "arm,arch-cache";
				cache-size = <0x40000>;
@@ -2528,3 +2530,4 @@
	status = "ok";
};
#include "lagoon-bus.dtsi"
#include "lagoon-thermal.dtsi"