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Commit def31195 authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: npucc: Update NPU HM cal frequency plan 



The npu cal hm clock frequencies are updated as per the latest
recommendation, thus update the frequency table and also the fmax
corners.

Change-Id: I1c1d3121f1f7db2cc680043cb3f8c518ac0b5bc3
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 1180b8e6

drivers/clk/qcom/npucc-lagoon.c

+7 −7
Original line number Diff line number Diff line
@@ -228,11 +228,11 @@ static struct clk_fixed_factor npu_cc_crc_div = { 


static const struct freq_tbl ftbl_npu_cc_cal_hm0_clk_src[] = {

	F(100000000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(192000000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(268800000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(403200000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(515000000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(650000000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(850000000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	F(748800000, P_NPU_CC_CRC_DIV, 1, 0, 0),

	{ }

};
@@ -253,11 +253,11 @@ static struct clk_rcg2 npu_cc_cal_hm0_clk_src = { 
		.num_rate_max = VDD_NUM,

		.rate_max = (unsigned long[VDD_NUM]) {

			[VDD_MIN] = 100000000,

			[VDD_LOWER] = 268800000,

			[VDD_LOW] = 403200000,

			[VDD_LOW_L1] = 515000000,

			[VDD_NOMINAL] = 650000000,

			[VDD_HIGH] = 850000000},

			[VDD_LOWER] = 192000000,

			[VDD_LOW] = 268800000,

			[VDD_LOW_L1] = 403200000,

			[VDD_NOMINAL] = 515000000,

			[VDD_HIGH] = 748800000},

	},

};