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Commit de842eff authored by Keith Packard's avatar Keith Packard
Browse files

drm/i915: Wait for LVDS panel power sequence 



During mode setting, check to make sure the panel power sequencing has
completed before doing further operations on the device. This
uncovered errors with DPMS not turning the device off as it was left locked.

Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 322a8b03

drivers/gpu/drm/i915/intel_lvds.c

+14 −12
Original line number Diff line number Diff line
@@ -72,14 +72,16 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds) 
{

	struct drm_device *dev = intel_lvds->base.base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 ctl_reg, lvds_reg;

	u32 ctl_reg, lvds_reg, stat_reg;



	if (HAS_PCH_SPLIT(dev)) {

		ctl_reg = PCH_PP_CONTROL;

		lvds_reg = PCH_LVDS;

		stat_reg = PCH_PP_STATUS;

	} else {

		ctl_reg = PP_CONTROL;

		lvds_reg = LVDS;

		stat_reg = PP_STATUS;

	}



	I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
@@ -94,17 +96,16 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds) 
		DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",

			      intel_lvds->pfit_control,

			      intel_lvds->pfit_pgm_ratios);

		if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {

			DRM_ERROR("timed out waiting for panel to power off\n");

		} else {



		I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);

		I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);

		intel_lvds->pfit_dirty = false;

	}

	}



	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);

	POSTING_READ(lvds_reg);

	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))

		DRM_ERROR("timed out waiting for panel to power on\n");



	intel_panel_enable_backlight(dev);

}
@@ -113,24 +114,25 @@ static void intel_lvds_disable(struct intel_lvds *intel_lvds) 
{

	struct drm_device *dev = intel_lvds->base.base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 ctl_reg, lvds_reg;

	u32 ctl_reg, lvds_reg, stat_reg;



	if (HAS_PCH_SPLIT(dev)) {

		ctl_reg = PCH_PP_CONTROL;

		lvds_reg = PCH_LVDS;

		stat_reg = PCH_PP_STATUS;

	} else {

		ctl_reg = PP_CONTROL;

		lvds_reg = LVDS;

		stat_reg = PP_STATUS;

	}



	intel_panel_disable_backlight(dev);



	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);



	if (intel_lvds->pfit_control) {

		if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))

	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))

		DRM_ERROR("timed out waiting for panel to power off\n");



	if (intel_lvds->pfit_control) {

		I915_WRITE(PFIT_CONTROL, 0);

		intel_lvds->pfit_dirty = true;

	}