Loading arch/arm64/boot/dts/qcom/kona-sde-pll.dtsi +4 −0 Original line number Original line Diff line number Diff line Loading @@ -17,6 +17,8 @@ clock-names = "iface_clk"; clock-names = "iface_clk"; clock-rate = <0>; clock-rate = <0>; gdsc-supply = <&mdss_core_gdsc>; gdsc-supply = <&mdss_core_gdsc>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { qcom,platform-supply-entries { #address-cells = <1>; #address-cells = <1>; #size-cells = <0>; #size-cells = <0>; Loading Loading @@ -44,6 +46,8 @@ clock-names = "iface_clk"; clock-names = "iface_clk"; clock-rate = <0>; clock-rate = <0>; gdsc-supply = <&mdss_core_gdsc>; gdsc-supply = <&mdss_core_gdsc>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { qcom,platform-supply-entries { #address-cells = <1>; #address-cells = <1>; #size-cells = <0>; #size-cells = <0>; Loading Loading
arch/arm64/boot/dts/qcom/kona-sde-pll.dtsi +4 −0 Original line number Original line Diff line number Diff line Loading @@ -17,6 +17,8 @@ clock-names = "iface_clk"; clock-names = "iface_clk"; clock-rate = <0>; clock-rate = <0>; gdsc-supply = <&mdss_core_gdsc>; gdsc-supply = <&mdss_core_gdsc>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { qcom,platform-supply-entries { #address-cells = <1>; #address-cells = <1>; #size-cells = <0>; #size-cells = <0>; Loading Loading @@ -44,6 +46,8 @@ clock-names = "iface_clk"; clock-names = "iface_clk"; clock-rate = <0>; clock-rate = <0>; gdsc-supply = <&mdss_core_gdsc>; gdsc-supply = <&mdss_core_gdsc>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { qcom,platform-supply-entries { #address-cells = <1>; #address-cells = <1>; #size-cells = <0>; #size-cells = <0>; Loading