Loading arch/arm64/boot/dts/qcom/lito.dtsi +15 −14 Original line number Diff line number Diff line Loading @@ -481,7 +481,7 @@ redistributor-stride = <0x0 0x20000>; reg = <0x17a00000 0x10000>, /* GICD */ <0x17a60000 0x100000>; /* GICR * 8 */ interrupts = <1 8 4>; interrupts = <GIC_PPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; }; Loading @@ -497,10 +497,10 @@ timer { compatible = "arm,armv8-timer"; interrupts = <1 1 0xf08>, <1 2 0xf08>, <1 3 0xf08>, <1 0 0xf08>; interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <19200000>; }; Loading @@ -514,50 +514,50 @@ frame@17c21000 { frame-number = <0>; interrupts = <0 8 0x4>, <0 6 0x4>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c21000 0x1000>, <0x17c22000 0x1000>; }; frame@17c23000 { frame-number = <1>; interrupts = <0 9 0x4>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c23000 0x1000>; status = "disabled"; }; frame@17c25000 { frame-number = <2>; interrupts = <0 10 0x4>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c25000 0x1000>; status = "disabled"; }; frame@17c27000 { frame-number = <3>; interrupts = <0 11 0x4>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c27000 0x1000>; status = "disabled"; }; frame@17c29000 { frame-number = <4>; interrupts = <0 12 0x4>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c29000 0x1000>; status = "disabled"; }; frame@17c2b000 { frame-number = <5>; interrupts = <0 13 0x4>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c2b000 0x1000>; status = "disabled"; }; frame@17c2d000 { frame-number = <6>; interrupts = <0 14 0x4>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c2d000 0x1000>; status = "disabled"; }; Loading Loading @@ -628,7 +628,8 @@ compatible = "qcom,msm-watchdog"; reg = <0x17c10000 0x1000>; reg-names = "wdt-base"; interrupts = <0 0 0>, <0 1 0>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; qcom,bark-time = <11000>; qcom,pet-time = <9360>; qcom,ipi-ping; Loading Loading
arch/arm64/boot/dts/qcom/lito.dtsi +15 −14 Original line number Diff line number Diff line Loading @@ -481,7 +481,7 @@ redistributor-stride = <0x0 0x20000>; reg = <0x17a00000 0x10000>, /* GICD */ <0x17a60000 0x100000>; /* GICR * 8 */ interrupts = <1 8 4>; interrupts = <GIC_PPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; }; Loading @@ -497,10 +497,10 @@ timer { compatible = "arm,armv8-timer"; interrupts = <1 1 0xf08>, <1 2 0xf08>, <1 3 0xf08>, <1 0 0xf08>; interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <19200000>; }; Loading @@ -514,50 +514,50 @@ frame@17c21000 { frame-number = <0>; interrupts = <0 8 0x4>, <0 6 0x4>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c21000 0x1000>, <0x17c22000 0x1000>; }; frame@17c23000 { frame-number = <1>; interrupts = <0 9 0x4>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c23000 0x1000>; status = "disabled"; }; frame@17c25000 { frame-number = <2>; interrupts = <0 10 0x4>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c25000 0x1000>; status = "disabled"; }; frame@17c27000 { frame-number = <3>; interrupts = <0 11 0x4>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c27000 0x1000>; status = "disabled"; }; frame@17c29000 { frame-number = <4>; interrupts = <0 12 0x4>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c29000 0x1000>; status = "disabled"; }; frame@17c2b000 { frame-number = <5>; interrupts = <0 13 0x4>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c2b000 0x1000>; status = "disabled"; }; frame@17c2d000 { frame-number = <6>; interrupts = <0 14 0x4>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17c2d000 0x1000>; status = "disabled"; }; Loading Loading @@ -628,7 +628,8 @@ compatible = "qcom,msm-watchdog"; reg = <0x17c10000 0x1000>; reg-names = "wdt-base"; interrupts = <0 0 0>, <0 1 0>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; qcom,bark-time = <11000>; qcom,pet-time = <9360>; qcom,ipi-ping; Loading