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Commit dd55c4ea authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'r8169-enable-ASPM-on-RTL8168E-VL' 



Heiner Kallweit says:

====================
r8169: enable ASPM on RTL8168E-VL

This patch series enables ASPM for the RTL8168E-VL and aligns ASPM entry
latency handling with the vendor driver before.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents a055b02f aa1e7d2c

drivers/net/ethernet/realtek/r8169.c

+21 −24
Original line number Diff line number Diff line
@@ -5235,12 +5235,7 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) 
	rtl_csi_write(tp, 0x070c, csi | val << 24);

}



static void rtl_csi_access_enable_1(struct rtl8169_private *tp)

{

	rtl_csi_access_enable(tp, 0x17);

}



static void rtl_csi_access_enable_2(struct rtl8169_private *tp)

static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp)

{

	rtl_csi_access_enable(tp, 0x27);

}
@@ -5347,7 +5342,7 @@ static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp) 
		{ 0x07, 0,	0x2000 }

	};



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_ephy_init(tp, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
@@ -5356,7 +5351,7 @@ static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp) 


static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
@@ -5369,7 +5364,7 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp) 


static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
@@ -5393,7 +5388,7 @@ static void rtl_hw_start_8168c_1(struct rtl8169_private *tp) 
		{ 0x06, 0x0080,	0x0000 }

	};



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	RTL_W8(tp, DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
@@ -5409,7 +5404,7 @@ static void rtl_hw_start_8168c_2(struct rtl8169_private *tp) 
		{ 0x03, 0x0400,	0x0220 }

	};



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_ephy_init(tp, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
@@ -5423,14 +5418,14 @@ static void rtl_hw_start_8168c_3(struct rtl8169_private *tp) 


static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	__rtl_hw_start_8168cp(tp);

}



static void rtl_hw_start_8168d(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_disable_clock_request(tp);
@@ -5445,7 +5440,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp) 


static void rtl_hw_start_8168dp(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	if (tp->dev->mtu <= ETH_DATA_LEN)

		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5463,7 +5458,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp) 
		{ 0x0c, 0x0100,	0x0020 }

	};



	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5492,7 +5487,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp) 
		{ 0x0a, 0x0000,	0x0040 }

	};



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
@@ -5517,7 +5512,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) 
		{ 0x19, 0x0000,	0x0224 }

	};



	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
@@ -5546,11 +5541,13 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) 
	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);

	RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);

	RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);



	rtl_hw_aspm_clkreq_enable(tp, true);

}



static void rtl_hw_start_8168f(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5621,7 +5618,7 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp) 
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);

	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);



	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5720,7 +5717,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) 
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);

	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);



	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5804,7 +5801,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp) 
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x5f, ERIAR_EXGMAC);

	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);



	rtl_csi_access_enable_1(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -6040,7 +6037,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp) 
	};

	u8 cfg1;



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	RTL_W8(tp, DBG_REG, FIX_NAK_1);
@@ -6059,7 +6056,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp) 


static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)

{

	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -6114,7 +6111,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) 
		{ 0x1e,	0, 0x4000 }

	};



	rtl_csi_access_enable_2(tp);

	rtl_set_def_aspm_entry_latency(tp);



	/* Force LAN exit from ASPM if Rx/Tx are not idle */

	RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);