Merge "clk: qcom: Add support for divider flags and table" (dcfdf56c) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/clk/qcom/clk-regmap-divider.c

+12 −16

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2014, The Linux Foundation. All rights reserved.
		*
		* This software is licensed under the terms of the GNU General Public
		* License version 2, as published by the Free Software Foundation, and
		* may be copied, distributed, and modified under those terms.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
		*/

		#include <linux/kernel.h>
		@@ -43,8 +35,10 @@ static long div_round_rate(struct clk_hw *hw, unsigned long rate,
		{
		struct clk_regmap_div *divider = to_clk_regmap_div(hw);

		return divider_round_rate(hw, rate, prate, NULL, divider->width,
		CLK_DIVIDER_ROUND_CLOSEST);
		return divider_round_rate(hw, rate, prate, divider->table,
		divider->width,
		CLK_DIVIDER_ROUND_CLOSEST \|
		divider->flags);
		}

		static int div_set_rate(struct clk_hw *hw, unsigned long rate,
		@@ -54,8 +48,9 @@ static int div_set_rate(struct clk_hw *hw, unsigned long rate,
		struct clk_regmap *clkr = &divider->clkr;
		u32 div;

		div = divider_get_val(rate, parent_rate, NULL, divider->width,
		CLK_DIVIDER_ROUND_CLOSEST);
		div = divider_get_val(rate, parent_rate, divider->table,
		divider->width, CLK_DIVIDER_ROUND_CLOSEST \|
		divider->flags);

		return regmap_update_bits(clkr->regmap, divider->reg,
		(BIT(divider->width) - 1) << divider->shift,
		@@ -73,8 +68,9 @@ static unsigned long div_recalc_rate(struct clk_hw *hw,
		div >>= divider->shift;
		div &= BIT(divider->width) - 1;

		return divider_recalc_rate(hw, parent_rate, div, NULL,
		CLK_DIVIDER_ROUND_CLOSEST, divider->width);
		return divider_recalc_rate(hw, parent_rate, div, divider->table,
		CLK_DIVIDER_ROUND_CLOSEST \| divider->flags,
		divider->width);
		}

		const struct clk_ops clk_regmap_div_ops = {

drivers/clk/qcom/clk-regmap-divider.h

+7 −6

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2014,2019 The Linux Foundation. All rights reserved.
		* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
		*/

		#ifndef __QCOM_CLK_REGMAP_DIVIDER_H__
		@@ -14,6 +14,7 @@ struct clk_regmap_div {
		u32 shift;
		u32 width;
		u32 flags;
		const struct clk_div_table *table;
		struct clk_regmap clkr;
		};