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Commit dbcac9c8 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: add max scl ratio to soc bounding box

parent ece4147f
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+2 −0
Original line number Diff line number Diff line
@@ -111,6 +111,8 @@ struct _vcs_dpi_soc_bounding_box_st {
	double xfc_bus_transport_time_us;
	double xfc_xbuf_latency_tolerance_us;
	int use_urgent_burst_bw;
	double max_hscl_ratio;
	double max_vscl_ratio;
	struct _vcs_dpi_voltage_scaling_st clock_limits[7];
};