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Commit db60d8da authored by Vinod Koul's avatar Vinod Koul
Browse files

dmanengine: fix edma driver to not define DMA_COMPLETE 



edma header defines DMA_COMPLETE, this causes issues as commit adfedd9a move
DMA_SUCCESS to DMA_COMPLETE. edma should properly namespace its defines and
needs a future fix

Reported-by: default avatarOlof Johansson <olof@lixom.net>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 7db5f727

arch/arm/common/edma.c

+2 −2
Original line number Diff line number Diff line
@@ -404,7 +404,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data) 
					BIT(slot));

			if (edma_cc[ctlr]->intr_data[channel].callback)

				edma_cc[ctlr]->intr_data[channel].callback(

					channel, DMA_COMPLETE,

					channel, EDMA_DMA_COMPLETE,

					edma_cc[ctlr]->intr_data[channel].data);

		}

	} while (sh_ipr);
@@ -459,7 +459,7 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data) 
								callback) {

						edma_cc[ctlr]->intr_data[k].

						callback(k,

						DMA_CC_ERROR,

						EDMA_DMA_CC_ERROR,

						edma_cc[ctlr]->intr_data

						[k].data);

					}

drivers/dma/edma.c

+2 −2
Original line number Diff line number Diff line
@@ -407,7 +407,7 @@ static void edma_callback(unsigned ch_num, u16 ch_status, void *data) 
	edma_pause(echan->ch_num);



	switch (ch_status) {

	case DMA_COMPLETE:

	case EDMA_DMA_COMPLETE:

		spin_lock_irqsave(&echan->vchan.lock, flags);



		edesc = echan->edesc;
@@ -426,7 +426,7 @@ static void edma_callback(unsigned ch_num, u16 ch_status, void *data) 
		spin_unlock_irqrestore(&echan->vchan.lock, flags);



		break;

	case DMA_CC_ERROR:

	case EDMA_DMA_CC_ERROR:

		spin_lock_irqsave(&echan->vchan.lock, flags);



		edma_read_slot(EDMA_CHAN_SLOT(echan->slot[0]), &p);

include/linux/platform_data/edma.h

+4 −4
Original line number Diff line number Diff line
@@ -67,10 +67,10 @@ struct edmacc_param { 
#define ITCCHEN		BIT(23)



/*ch_status paramater of callback function possible values*/

#define DMA_COMPLETE 1

#define DMA_CC_ERROR 2

#define DMA_TC1_ERROR 3

#define DMA_TC2_ERROR 4

#define EDMA_DMA_COMPLETE 1

#define EDMA_DMA_CC_ERROR 2

#define EDMA_DMA_TC1_ERROR 3

#define EDMA_DMA_TC2_ERROR 4



enum address_mode {

	INCR = 0,