Merge "msm: kgsl: Update the sequence to resume stalled SMMU" (dad85225) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/gpu/msm/kgsl_iommu.c

+34 −11

Original line number	Diff line number	Diff line
		@@ -7,6 +7,7 @@
		#include <linux/iommu.h>
		#include <linux/of_platform.h>
		#include <linux/seq_file.h>
		#include <linux/delay.h>
		#include <soc/qcom/scm.h>
		#include <soc/qcom/secure_buffer.h>

		@@ -1985,8 +1986,18 @@ static void kgsl_iommu_pagefault_resume(struct kgsl_mmu *mmu)
		{
		struct kgsl_iommu *iommu = _IOMMU_PRIV(mmu);
		struct kgsl_iommu_context *ctx = &iommu->ctx[KGSL_IOMMU_CONTEXT_USER];
		unsigned int fsr_val;

		if (ctx->default_pt != NULL && ctx->fault) {
		while (1) {
		KGSL_IOMMU_SET_CTX_REG(ctx, FSR, 0xffffffff);
		/*
		* Make sure the above register write
		* is not reordered across the barrier
		* as we use writel_relaxed to write it.
		*/
		wmb();

		/*
		* Write 1 to RESUME.TnR to terminate the
		* stalled transaction.
		@@ -1998,6 +2009,18 @@ static void kgsl_iommu_pagefault_resume(struct kgsl_mmu *mmu)
		* as we use writel_relaxed to write them
		*/
		wmb();

		/*
		* Wait for small time before checking SS bit
		* to allow transactions to go through after
		* resume and update SS bit in case more faulty
		* transactions are pending.
		*/
		udelay(5);
		fsr_val = KGSL_IOMMU_GET_CTX_REG(ctx, FSR);
		if (!(fsr_val & (1 << KGSL_IOMMU_FSR_SS_SHIFT)))
		break;
		}
		ctx->fault = 0;
		}
		}

+3 −0

Original line number	Diff line number	Diff line
		@@ -47,6 +47,9 @@
		#define KGSL_IOMMU_SCTLR_CFCFG_SHIFT 7
		#define KGSL_IOMMU_SCTLR_CFIE_SHIFT 6

		/* FSR fields */
		#define KGSL_IOMMU_FSR_SS_SHIFT 30

		enum kgsl_iommu_reg_map {
		KGSL_IOMMU_CTX_SCTLR = 0,
		KGSL_IOMMU_CTX_TTBR0,