Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit da4b9b30 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "asoc: bolero: do not disable tx macro clk during SSR/PDR"

parents c2cab395 69b55c85

asoc/codecs/bolero/tx-macro.c

+9 −6
Original line number Diff line number Diff line
@@ -1470,7 +1470,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
				      struct regmap *regmap, int clk_type,

				      bool enable)

{

	int ret = 0;

	int ret = 0, clk_tx_ret = 0;



	dev_dbg(tx_priv->dev,

		"%s: clock type %s, enable: %s tx_mclk_users: %d\n",
@@ -1482,7 +1482,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
			msm_cdc_pinctrl_select_active_state(

						tx_priv->tx_swr_gpio_p);



		ret = bolero_clk_rsc_request_clock(tx_priv->dev,

		clk_tx_ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						   TX_CORE_CLK,

						   TX_CORE_CLK,

						   true);
@@ -1540,6 +1540,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
					0x02, 0x00);

			tx_priv->reset_swr = false;

		}

		if (!clk_tx_ret)

			ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						   TX_CORE_CLK,

						   TX_CORE_CLK,
@@ -1552,7 +1553,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
			tx_priv->swr_clk_users = 0;

			return 0;

		}

		ret = bolero_clk_rsc_request_clock(tx_priv->dev,

		clk_tx_ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						   TX_CORE_CLK,

						   TX_CORE_CLK,

						   true);
@@ -1583,6 +1584,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
				goto done;

			}

		}

		if (!clk_tx_ret)

			ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						   TX_CORE_CLK,

						   TX_CORE_CLK,
@@ -1594,6 +1596,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
	return 0;



done:

	if (!clk_tx_ret)

		bolero_clk_rsc_request_clock(tx_priv->dev,

				TX_CORE_CLK,

				TX_CORE_CLK,