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Commit da3b6c05 authored Feb 01, 2012 by Diana CRACIUN Committed by Kumar Gala Mar 16, 2012

powerpc/fsl: Added aliased MSIIR register address to MSI node in dts



The MSIIR register for each MSI bank is aliased to a different
address. The MSI node reg property was updated to contain this
address:

e.g. reg = <0x41600 0x200 0x44140 4>;

The first region contains the address and length of the MSI
register set and the second region contains the address of
the aliased MSIIR register at 0x44140.

Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

parent a2279e3f

Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt

+4 −2

Original line number	Diff line number	Diff line
		@@ -6,8 +6,10 @@ Required properties:
		etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
		the parent type.

		- reg : should contain the address and the length of the shared message
		interrupt register set.
		- reg : It may contain one or two regions. The first region should contain
		the address and the length of the shared message interrupt register set.
		The second region should contain the address of aliased MSIIR register for
		platforms that have such an alias.

		- msi-available-ranges: use <start count> style section to define which
		msi interrupt can be used in the 256 msi interrupts. This property is

arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -53,7 +53,7 @@ timer@41100 {

		msi0: msi@41600 {
		compatible = "fsl,mpic-msi";
		reg = <0x41600 0x200>;
		reg = <0x41600 0x200 0x44140 4>;
		msi-available-ranges = <0 0x100>;
		interrupts = <
		0xe0 0 0 0
		@@ -68,7 +68,7 @@ msi0: msi@41600 {

		msi1: msi@41800 {
		compatible = "fsl,mpic-msi";
		reg = <0x41800 0x200>;
		reg = <0x41800 0x200 0x45140 4>;
		msi-available-ranges = <0 0x100>;
		interrupts = <
		0xe8 0 0 0
		@@ -83,7 +83,7 @@ msi1: msi@41800 {

		msi2: msi@41a00 {
		compatible = "fsl,mpic-msi";
		reg = <0x41a00 0x200>;
		reg = <0x41a00 0x200 0x46140 4>;
		msi-available-ranges = <0 0x100>;
		interrupts = <
		0xf0 0 0 0