Loading arch/arm/mach-at91/gpio.c +17 −17 Original line number Original line Diff line number Diff line Loading @@ -274,10 +274,10 @@ EXPORT_SYMBOL(at91_get_gpio_value); static u32 wakeups[MAX_GPIO_BANKS]; static u32 wakeups[MAX_GPIO_BANKS]; static u32 backups[MAX_GPIO_BANKS]; static u32 backups[MAX_GPIO_BANKS]; static int gpio_irq_set_wake(unsigned pin, unsigned state) static int gpio_irq_set_wake(struct irq_data *d, unsigned state) { { unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); unsigned bank = (pin - PIN_BASE) / 32; unsigned bank = (d->irq - PIN_BASE) / 32; if (unlikely(bank >= MAX_GPIO_BANKS)) if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; return -EINVAL; Loading Loading @@ -344,25 +344,25 @@ void at91_gpio_resume(void) * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering. * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering. */ */ static void gpio_irq_mask(unsigned pin) static void gpio_irq_mask(struct irq_data *d) { { void __iomem *pio = pin_to_controller(pin); void __iomem *pio = pin_to_controller(d->irq); unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); if (pio) if (pio) __raw_writel(mask, pio + PIO_IDR); __raw_writel(mask, pio + PIO_IDR); } } static void gpio_irq_unmask(unsigned pin) static void gpio_irq_unmask(struct irq_data *d) { { void __iomem *pio = pin_to_controller(pin); void __iomem *pio = pin_to_controller(d->irq); unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); if (pio) if (pio) __raw_writel(mask, pio + PIO_IER); __raw_writel(mask, pio + PIO_IER); } } static int gpio_irq_type(unsigned pin, unsigned type) static int gpio_irq_type(struct irq_data *d, unsigned type) { { switch (type) { switch (type) { case IRQ_TYPE_NONE: case IRQ_TYPE_NONE: Loading @@ -375,10 +375,10 @@ static int gpio_irq_type(unsigned pin, unsigned type) static struct irq_chip gpio_irqchip = { static struct irq_chip gpio_irqchip = { .name = "GPIO", .name = "GPIO", .mask = gpio_irq_mask, .irq_mask = gpio_irq_mask, .unmask = gpio_irq_unmask, .irq_unmask = gpio_irq_unmask, .set_type = gpio_irq_type, .irq_set_type = gpio_irq_type, .set_wake = gpio_irq_set_wake, .irq_set_wake = gpio_irq_set_wake, }; }; static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) Loading @@ -393,7 +393,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) pio = at91_gpio->regbase; pio = at91_gpio->regbase; /* temporarily mask (level sensitive) parent IRQ */ /* temporarily mask (level sensitive) parent IRQ */ desc->chip->ack(irq); desc->irq_data.chip->irq_ack(&desc->irq_data); for (;;) { for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need * When there none are pending, we're finished unless we need Loading @@ -419,7 +419,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) * another IRQ must be generated before it actually gets * another IRQ must be generated before it actually gets * here to be disabled on the GPIO controller. * here to be disabled on the GPIO controller. */ */ gpio_irq_mask(pin); gpio_irq_mask(irq_get_irq_data(pin)); } } else else generic_handle_irq(pin); generic_handle_irq(pin); Loading @@ -429,7 +429,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) isr >>= 1; isr >>= 1; } } } } desc->chip->unmask(irq); desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ /* now it may re-trigger */ } } Loading arch/arm/mach-at91/irq.c +18 −18 Original line number Original line Diff line number Diff line Loading @@ -34,23 +34,23 @@ #include <asm/mach/map.h> #include <asm/mach/map.h> static void at91_aic_mask_irq(unsigned int irq) static void at91_aic_mask_irq(struct irq_data *d) { { /* Disable interrupt on AIC */ /* Disable interrupt on AIC */ at91_sys_write(AT91_AIC_IDCR, 1 << irq); at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); } } static void at91_aic_unmask_irq(unsigned int irq) static void at91_aic_unmask_irq(struct irq_data *d) { { /* Enable interrupt on AIC */ /* Enable interrupt on AIC */ at91_sys_write(AT91_AIC_IECR, 1 << irq); at91_sys_write(AT91_AIC_IECR, 1 << d->irq); } } unsigned int at91_extern_irq; unsigned int at91_extern_irq; #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) static int at91_aic_set_type(unsigned irq, unsigned type) static int at91_aic_set_type(struct irq_data *d, unsigned type) { { unsigned int smr, srctype; unsigned int smr, srctype; Loading @@ -62,13 +62,13 @@ static int at91_aic_set_type(unsigned irq, unsigned type) srctype = AT91_AIC_SRCTYPE_RISING; srctype = AT91_AIC_SRCTYPE_RISING; break; break; case IRQ_TYPE_LEVEL_LOW: case IRQ_TYPE_LEVEL_LOW: if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_LOW; srctype = AT91_AIC_SRCTYPE_LOW; else else return -EINVAL; return -EINVAL; break; break; case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_EDGE_FALLING: if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_FALLING; srctype = AT91_AIC_SRCTYPE_FALLING; else else return -EINVAL; return -EINVAL; Loading @@ -77,8 +77,8 @@ static int at91_aic_set_type(unsigned irq, unsigned type) return -EINVAL; return -EINVAL; } } smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE; smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; at91_sys_write(AT91_AIC_SMR(irq), smr | srctype); at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); return 0; return 0; } } Loading @@ -87,15 +87,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type) static u32 wakeups; static u32 wakeups; static u32 backups; static u32 backups; static int at91_aic_set_wake(unsigned irq, unsigned value) static int at91_aic_set_wake(struct irq_data *d, unsigned value) { { if (unlikely(irq >= 32)) if (unlikely(d->irq >= 32)) return -EINVAL; return -EINVAL; if (value) if (value) wakeups |= (1 << irq); wakeups |= (1 << d->irq); else else wakeups &= ~(1 << irq); wakeups &= ~(1 << d->irq); return 0; return 0; } } Loading @@ -119,11 +119,11 @@ void at91_irq_resume(void) static struct irq_chip at91_aic_chip = { static struct irq_chip at91_aic_chip = { .name = "AIC", .name = "AIC", .ack = at91_aic_mask_irq, .irq_ack = at91_aic_mask_irq, .mask = at91_aic_mask_irq, .irq_mask = at91_aic_mask_irq, .unmask = at91_aic_unmask_irq, .irq_unmask = at91_aic_unmask_irq, .set_type = at91_aic_set_type, .irq_set_type = at91_aic_set_type, .set_wake = at91_aic_set_wake, .irq_set_wake = at91_aic_set_wake, }; }; /* /* Loading Loading
arch/arm/mach-at91/gpio.c +17 −17 Original line number Original line Diff line number Diff line Loading @@ -274,10 +274,10 @@ EXPORT_SYMBOL(at91_get_gpio_value); static u32 wakeups[MAX_GPIO_BANKS]; static u32 wakeups[MAX_GPIO_BANKS]; static u32 backups[MAX_GPIO_BANKS]; static u32 backups[MAX_GPIO_BANKS]; static int gpio_irq_set_wake(unsigned pin, unsigned state) static int gpio_irq_set_wake(struct irq_data *d, unsigned state) { { unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); unsigned bank = (pin - PIN_BASE) / 32; unsigned bank = (d->irq - PIN_BASE) / 32; if (unlikely(bank >= MAX_GPIO_BANKS)) if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; return -EINVAL; Loading Loading @@ -344,25 +344,25 @@ void at91_gpio_resume(void) * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering. * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering. */ */ static void gpio_irq_mask(unsigned pin) static void gpio_irq_mask(struct irq_data *d) { { void __iomem *pio = pin_to_controller(pin); void __iomem *pio = pin_to_controller(d->irq); unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); if (pio) if (pio) __raw_writel(mask, pio + PIO_IDR); __raw_writel(mask, pio + PIO_IDR); } } static void gpio_irq_unmask(unsigned pin) static void gpio_irq_unmask(struct irq_data *d) { { void __iomem *pio = pin_to_controller(pin); void __iomem *pio = pin_to_controller(d->irq); unsigned mask = pin_to_mask(pin); unsigned mask = pin_to_mask(d->irq); if (pio) if (pio) __raw_writel(mask, pio + PIO_IER); __raw_writel(mask, pio + PIO_IER); } } static int gpio_irq_type(unsigned pin, unsigned type) static int gpio_irq_type(struct irq_data *d, unsigned type) { { switch (type) { switch (type) { case IRQ_TYPE_NONE: case IRQ_TYPE_NONE: Loading @@ -375,10 +375,10 @@ static int gpio_irq_type(unsigned pin, unsigned type) static struct irq_chip gpio_irqchip = { static struct irq_chip gpio_irqchip = { .name = "GPIO", .name = "GPIO", .mask = gpio_irq_mask, .irq_mask = gpio_irq_mask, .unmask = gpio_irq_unmask, .irq_unmask = gpio_irq_unmask, .set_type = gpio_irq_type, .irq_set_type = gpio_irq_type, .set_wake = gpio_irq_set_wake, .irq_set_wake = gpio_irq_set_wake, }; }; static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) Loading @@ -393,7 +393,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) pio = at91_gpio->regbase; pio = at91_gpio->regbase; /* temporarily mask (level sensitive) parent IRQ */ /* temporarily mask (level sensitive) parent IRQ */ desc->chip->ack(irq); desc->irq_data.chip->irq_ack(&desc->irq_data); for (;;) { for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need * When there none are pending, we're finished unless we need Loading @@ -419,7 +419,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) * another IRQ must be generated before it actually gets * another IRQ must be generated before it actually gets * here to be disabled on the GPIO controller. * here to be disabled on the GPIO controller. */ */ gpio_irq_mask(pin); gpio_irq_mask(irq_get_irq_data(pin)); } } else else generic_handle_irq(pin); generic_handle_irq(pin); Loading @@ -429,7 +429,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) isr >>= 1; isr >>= 1; } } } } desc->chip->unmask(irq); desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ /* now it may re-trigger */ } } Loading
arch/arm/mach-at91/irq.c +18 −18 Original line number Original line Diff line number Diff line Loading @@ -34,23 +34,23 @@ #include <asm/mach/map.h> #include <asm/mach/map.h> static void at91_aic_mask_irq(unsigned int irq) static void at91_aic_mask_irq(struct irq_data *d) { { /* Disable interrupt on AIC */ /* Disable interrupt on AIC */ at91_sys_write(AT91_AIC_IDCR, 1 << irq); at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); } } static void at91_aic_unmask_irq(unsigned int irq) static void at91_aic_unmask_irq(struct irq_data *d) { { /* Enable interrupt on AIC */ /* Enable interrupt on AIC */ at91_sys_write(AT91_AIC_IECR, 1 << irq); at91_sys_write(AT91_AIC_IECR, 1 << d->irq); } } unsigned int at91_extern_irq; unsigned int at91_extern_irq; #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) static int at91_aic_set_type(unsigned irq, unsigned type) static int at91_aic_set_type(struct irq_data *d, unsigned type) { { unsigned int smr, srctype; unsigned int smr, srctype; Loading @@ -62,13 +62,13 @@ static int at91_aic_set_type(unsigned irq, unsigned type) srctype = AT91_AIC_SRCTYPE_RISING; srctype = AT91_AIC_SRCTYPE_RISING; break; break; case IRQ_TYPE_LEVEL_LOW: case IRQ_TYPE_LEVEL_LOW: if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_LOW; srctype = AT91_AIC_SRCTYPE_LOW; else else return -EINVAL; return -EINVAL; break; break; case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_EDGE_FALLING: if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_FALLING; srctype = AT91_AIC_SRCTYPE_FALLING; else else return -EINVAL; return -EINVAL; Loading @@ -77,8 +77,8 @@ static int at91_aic_set_type(unsigned irq, unsigned type) return -EINVAL; return -EINVAL; } } smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE; smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; at91_sys_write(AT91_AIC_SMR(irq), smr | srctype); at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); return 0; return 0; } } Loading @@ -87,15 +87,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type) static u32 wakeups; static u32 wakeups; static u32 backups; static u32 backups; static int at91_aic_set_wake(unsigned irq, unsigned value) static int at91_aic_set_wake(struct irq_data *d, unsigned value) { { if (unlikely(irq >= 32)) if (unlikely(d->irq >= 32)) return -EINVAL; return -EINVAL; if (value) if (value) wakeups |= (1 << irq); wakeups |= (1 << d->irq); else else wakeups &= ~(1 << irq); wakeups &= ~(1 << d->irq); return 0; return 0; } } Loading @@ -119,11 +119,11 @@ void at91_irq_resume(void) static struct irq_chip at91_aic_chip = { static struct irq_chip at91_aic_chip = { .name = "AIC", .name = "AIC", .ack = at91_aic_mask_irq, .irq_ack = at91_aic_mask_irq, .mask = at91_aic_mask_irq, .irq_mask = at91_aic_mask_irq, .unmask = at91_aic_unmask_irq, .irq_unmask = at91_aic_unmask_irq, .set_type = at91_aic_set_type, .irq_set_type = at91_aic_set_type, .set_wake = at91_aic_set_wake, .irq_set_wake = at91_aic_set_wake, }; }; /* /* Loading