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Commit d9d35c27 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ASoC: rouleur: Update hph registers based on foundry id"

parents 73d67e66 4b3e5232
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+12 −0
Original line number Diff line number Diff line
@@ -238,6 +238,18 @@ static int bolero_cdc_update_wcd_event(void *handle, u16 event, u32 data)
				priv->component,
				BOLERO_MACRO_EVT_RX_PA_GAIN_UPDATE, data);
		break;
	case WCD_BOLERO_EVT_HPHL_HD2_ENABLE:
		if (priv->macro_params[RX_MACRO].event_handler)
			priv->macro_params[RX_MACRO].event_handler(
				priv->component,
				BOLERO_MACRO_EVT_HPHL_HD2_ENABLE, data);
		break;
	case WCD_BOLERO_EVT_HPHR_HD2_ENABLE:
		if (priv->macro_params[RX_MACRO].event_handler)
			priv->macro_params[RX_MACRO].event_handler(
				priv->component,
				BOLERO_MACRO_EVT_HPHR_HD2_ENABLE, data);
		break;
	default:
		dev_err(priv->dev, "%s: Invalid event %d trigger from wcd\n",
			__func__, event);
+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,8 @@ enum {
	BOLERO_MACRO_EVT_SSR_GFMUX_UP,
	BOLERO_MACRO_EVT_PRE_SSR_UP,
	BOLERO_MACRO_EVT_RX_PA_GAIN_UPDATE,
	BOLERO_MACRO_EVT_HPHL_HD2_ENABLE, /* Enable HD2 cfg for HPHL */
	BOLERO_MACRO_EVT_HPHR_HD2_ENABLE, /* Enable HD2 cfg for HPHR */
};

enum {
+2 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@ enum {
	WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST,
	WCD_BOLERO_EVT_BCS_CLK_OFF,
	WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE,
	WCD_BOLERO_EVT_HPHL_HD2_ENABLE, /* to enable hd2 config for hphl */
	WCD_BOLERO_EVT_HPHR_HD2_ENABLE, /* to enable hd2 config for hphr */
};

struct wcd_ctrl_platform_data {
+10 −0
Original line number Diff line number Diff line
@@ -1463,6 +1463,16 @@ static int rx_macro_event_handler(struct snd_soc_component *component,
					 RX_MACRO_MOD_GAIN));
		}
		break;
	case BOLERO_MACRO_EVT_HPHL_HD2_ENABLE:
		/* Enable hd2 config for hphl*/
		snd_soc_component_update_bits(component,
				BOLERO_CDC_RX_RX0_RX_PATH_CFG0, 0x04, data);
		break;
	case BOLERO_MACRO_EVT_HPHR_HD2_ENABLE:
		/* Enable hd2 config for hphr*/
		snd_soc_component_update_bits(component,
				BOLERO_CDC_RX_RX1_RX_PATH_CFG0, 0x04, data);
		break;
	}
done:
	return ret;
+5 −0
Original line number Diff line number Diff line
@@ -88,6 +88,8 @@ struct rouleur_priv {
	struct notifier_block psy_nb;
	struct work_struct soc_eval_work;
	bool low_soc;
	int foundry_id_reg;
	int foundry_id;
};

struct rouleur_micbias_setting {
@@ -105,6 +107,7 @@ struct rouleur_pdata {
	struct cdc_regulator *regulator;
	int num_supplies;
	int reset_reg;
	int foundry_id_reg;
};

struct wcd_ctrl_platform_data {
@@ -135,6 +138,8 @@ enum {
	WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST,
	WCD_BOLERO_EVT_BCS_CLK_OFF,
	WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE, /* To reduce PA gain for low SoC */
	WCD_BOLERO_EVT_HPHL_HD2_ENABLE, /* to enable hd2 config for hphl */
	WCD_BOLERO_EVT_HPHR_HD2_ENABLE, /* to enable hd2 config for hphr */
};

enum {
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