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Commit d99434e1 authored by Max Filippov's avatar Max Filippov Committed by Chris Zankel
Browse files

xtensa: xtfpga: fix ethernet controller endianness 



Ethernet controller is attached to XTFPGA boards as native endian device,
mark it as such in DTS and pass correct endianness in platform data.
This makes network functional on big-endian CPUs.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent abfbd895

arch/xtensa/boot/dts/xtfpga.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ 
		enet0: ethoc@0d030000 {

			compatible = "opencores,ethoc";

			reg = <0x0d030000 0x4000 0x0d800000 0x4000>;

			native-endian;

			interrupts = <1 1>; /* external irq 1 */

			local-mac-address = [00 50 c2 13 6f 00];

			clocks = <&osc>;

arch/xtensa/platforms/xtfpga/setup.c

+1 −0
Original line number Diff line number Diff line
@@ -223,6 +223,7 @@ static struct ethoc_platform_data ethoc_pdata = { 
	 */

	.hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },

	.phy_id = -1,

	.big_endian = XCHAL_HAVE_BE,

};



static struct platform_device ethoc_device = {