Loading Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt +7 −5 Original line number Diff line number Diff line Loading @@ -16,11 +16,13 @@ Required Properties: - clocks: Array of clocks required for SDHC. Require at least input clock for Xenon IP core. Require at least input clock for Xenon IP core. For Armada AP806 and CP110, the AXI clock is also mandatory. - clock-names: Array of names corresponding to clocks property. The input clock for Xenon IP core should be named as "core". The input clock for the AXI bus must be named as "axi". - reg: * For "marvell,armada-3700-sdhci", two register areas. Loading Loading @@ -106,8 +108,8 @@ Example: compatible = "marvell,armada-ap806-sdhci"; reg = <0xaa0000 0x1000>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH> clocks = <&emmc_clk>; clock-names = "core"; clocks = <&emmc_clk>,<&axi_clk>; clock-names = "core", "axi"; bus-width = <4>; marvell,xenon-phy-slow-mode; marvell,xenon-tun-count = <11>; Loading @@ -126,8 +128,8 @@ Example: interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH> vqmmc-supply = <&sd_vqmmc_regulator>; vmmc-supply = <&sd_vmmc_regulator>; clocks = <&sdclk>; clock-names = "core"; clocks = <&sdclk>, <&axi_clk>; clock-names = "core", "axi"; bus-width = <4>; marvell,xenon-tun-count = <9>; }; Loading Documentation/filesystems/overlayfs.txt +4 −1 Original line number Diff line number Diff line Loading @@ -210,8 +210,11 @@ path as another overlay mount and it may use a lower layer path that is beneath or above the path of another overlay lower layer path. Using an upper layer path and/or a workdir path that are already used by another overlay mount is not allowed and will fail with EBUSY. Using another overlay mount is not allowed and may fail with EBUSY. Using partially overlapping paths is not allowed but will not fail with EBUSY. If files are accessed from two overlayfs mounts which share or overlap the upper layer and/or workdir path the behavior of the overlay is undefined, though it will not result in a crash or deadlock. Mounting an overlay using an upper layer path, where the upper layer path was previously used by another mounted overlay in combination with a Loading Documentation/i2c/busses/i2c-i801 +1 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,7 @@ Supported adapters: * Intel Gemini Lake (SOC) * Intel Cannon Lake-H (PCH) * Intel Cannon Lake-LP (PCH) * Intel Cedar Fork (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller Loading Documentation/networking/bonding.txt +1 −1 Original line number Diff line number Diff line Loading @@ -2387,7 +2387,7 @@ broadcast: Like active-backup, there is not much advantage to this and packet type ID), so in a "gatewayed" configuration, all outgoing traffic will generally use the same device. Incoming traffic may also end up on a single device, but that is dependent upon the balancing policy of the peer's 8023.ad dependent upon the balancing policy of the peer's 802.3ad implementation. In a "local" configuration, traffic will be distributed across the devices in the bond. Loading MAINTAINERS +3 −2 Original line number Diff line number Diff line Loading @@ -5259,7 +5259,8 @@ S: Maintained F: drivers/iommu/exynos-iommu.c EZchip NPS platform support M: Noam Camus <noamc@ezchip.com> M: Elad Kanfi <eladkan@mellanox.com> M: Vineet Gupta <vgupta@synopsys.com> S: Supported F: arch/arc/plat-eznps F: arch/arc/boot/dts/eznps.dts Loading Loading @@ -9360,7 +9361,7 @@ NETWORK BLOCK DEVICE (NBD) M: Josef Bacik <jbacik@fb.com> S: Maintained L: linux-block@vger.kernel.org L: nbd-general@lists.sourceforge.net L: nbd@other.debian.org F: Documentation/blockdev/nbd.txt F: drivers/block/nbd.c F: include/uapi/linux/nbd.h Loading Loading
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt +7 −5 Original line number Diff line number Diff line Loading @@ -16,11 +16,13 @@ Required Properties: - clocks: Array of clocks required for SDHC. Require at least input clock for Xenon IP core. Require at least input clock for Xenon IP core. For Armada AP806 and CP110, the AXI clock is also mandatory. - clock-names: Array of names corresponding to clocks property. The input clock for Xenon IP core should be named as "core". The input clock for the AXI bus must be named as "axi". - reg: * For "marvell,armada-3700-sdhci", two register areas. Loading Loading @@ -106,8 +108,8 @@ Example: compatible = "marvell,armada-ap806-sdhci"; reg = <0xaa0000 0x1000>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH> clocks = <&emmc_clk>; clock-names = "core"; clocks = <&emmc_clk>,<&axi_clk>; clock-names = "core", "axi"; bus-width = <4>; marvell,xenon-phy-slow-mode; marvell,xenon-tun-count = <11>; Loading @@ -126,8 +128,8 @@ Example: interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH> vqmmc-supply = <&sd_vqmmc_regulator>; vmmc-supply = <&sd_vmmc_regulator>; clocks = <&sdclk>; clock-names = "core"; clocks = <&sdclk>, <&axi_clk>; clock-names = "core", "axi"; bus-width = <4>; marvell,xenon-tun-count = <9>; }; Loading
Documentation/filesystems/overlayfs.txt +4 −1 Original line number Diff line number Diff line Loading @@ -210,8 +210,11 @@ path as another overlay mount and it may use a lower layer path that is beneath or above the path of another overlay lower layer path. Using an upper layer path and/or a workdir path that are already used by another overlay mount is not allowed and will fail with EBUSY. Using another overlay mount is not allowed and may fail with EBUSY. Using partially overlapping paths is not allowed but will not fail with EBUSY. If files are accessed from two overlayfs mounts which share or overlap the upper layer and/or workdir path the behavior of the overlay is undefined, though it will not result in a crash or deadlock. Mounting an overlay using an upper layer path, where the upper layer path was previously used by another mounted overlay in combination with a Loading
Documentation/i2c/busses/i2c-i801 +1 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,7 @@ Supported adapters: * Intel Gemini Lake (SOC) * Intel Cannon Lake-H (PCH) * Intel Cannon Lake-LP (PCH) * Intel Cedar Fork (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller Loading
Documentation/networking/bonding.txt +1 −1 Original line number Diff line number Diff line Loading @@ -2387,7 +2387,7 @@ broadcast: Like active-backup, there is not much advantage to this and packet type ID), so in a "gatewayed" configuration, all outgoing traffic will generally use the same device. Incoming traffic may also end up on a single device, but that is dependent upon the balancing policy of the peer's 8023.ad dependent upon the balancing policy of the peer's 802.3ad implementation. In a "local" configuration, traffic will be distributed across the devices in the bond. Loading
MAINTAINERS +3 −2 Original line number Diff line number Diff line Loading @@ -5259,7 +5259,8 @@ S: Maintained F: drivers/iommu/exynos-iommu.c EZchip NPS platform support M: Noam Camus <noamc@ezchip.com> M: Elad Kanfi <eladkan@mellanox.com> M: Vineet Gupta <vgupta@synopsys.com> S: Supported F: arch/arc/plat-eznps F: arch/arc/boot/dts/eznps.dts Loading Loading @@ -9360,7 +9361,7 @@ NETWORK BLOCK DEVICE (NBD) M: Josef Bacik <jbacik@fb.com> S: Maintained L: linux-block@vger.kernel.org L: nbd-general@lists.sourceforge.net L: nbd@other.debian.org F: Documentation/blockdev/nbd.txt F: drivers/block/nbd.c F: include/uapi/linux/nbd.h Loading