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Commit d925c59a authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: conditionally disable pch resources in ilk_crtc_disable 



Simlar to how disable already works on haswell. This is possible
since we now carefully track the pch state in the pipe config.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent cdbd2316

drivers/gpu/drm/i915/intel_display.c

+37 −32
Original line number Diff line number Diff line
@@ -3436,7 +3436,9 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 
	intel_disable_planes(crtc);

	intel_disable_plane(dev_priv, plane, pipe);



	if (intel_crtc->config.has_pch_encoder)

		intel_set_pch_fifo_underrun_reporting(dev, pipe, false);



	intel_disable_pipe(dev_priv, pipe);



	ironlake_pfit_disable(intel_crtc);
@@ -3445,6 +3447,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 
		if (encoder->post_disable)

			encoder->post_disable(encoder);



	if (intel_crtc->config.has_pch_encoder) {

		ironlake_fdi_disable(crtc);



		ironlake_disable_pch_transcoder(dev_priv, pipe);
@@ -3454,7 +3457,8 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 
			/* disable TRANS_DP_CTL */

			reg = TRANS_DP_CTL(pipe);

			temp = I915_READ(reg);

		temp &= ~(TRANS_DP_OUTPUT_ENABLE | TRANS_DP_PORT_SEL_MASK);

			temp &= ~(TRANS_DP_OUTPUT_ENABLE |

				  TRANS_DP_PORT_SEL_MASK);

			temp |= TRANS_DP_PORT_SEL_NONE;

			I915_WRITE(reg, temp);
@@ -3481,6 +3485,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 
		intel_disable_pch_pll(intel_crtc);



		ironlake_fdi_pll_disable(intel_crtc);

	}



	intel_crtc->active = false;

	intel_update_watermarks(dev);