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Commit d8e91e93 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/mm/radix: Add tlb flush of THP ptes 



Instead of flushing the entire mm, implement a flush_pmd_tlb_range

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 9d4dab11

arch/powerpc/include/asm/book3s/64/tlbflush-radix.h

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ static inline int mmu_get_ap(int psize) 


extern void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,

					 unsigned long end, int psize);

extern void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,

				       unsigned long start, unsigned long end);

extern void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,

			    unsigned long end);

extern void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end);

arch/powerpc/include/asm/book3s/64/tlbflush.h

+9 −0
Original line number Diff line number Diff line
@@ -7,6 +7,15 @@ 
#include <asm/book3s/64/tlbflush-hash.h>

#include <asm/book3s/64/tlbflush-radix.h>



#define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE

static inline void flush_pmd_tlb_range(struct vm_area_struct *vma,

				       unsigned long start, unsigned long end)

{

	if (radix_enabled())

		return radix__flush_pmd_tlb_range(vma, start, end);

	return hash__flush_tlb_range(vma, start, end);

}



static inline void flush_tlb_range(struct vm_area_struct *vma,

				   unsigned long start, unsigned long end)

{

arch/powerpc/mm/pgtable-book3s64.c

+2 −2
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address, 
	changed = !pmd_same(*(pmdp), entry);

	if (changed) {

		__ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));

		flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);

		flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);

	}

	return changed;

}
@@ -66,7 +66,7 @@ void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 
		     pmd_t *pmdp)

{

	pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);

	flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);

	flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);

	/*

	 * This ensures that generic code that rely on IRQ disabling

	 * to prevent a parallel THP split work as expected.

arch/powerpc/mm/tlb-radix.c

+7 −0
Original line number Diff line number Diff line
@@ -391,3 +391,10 @@ void radix__flush_tlb_lpid(unsigned long lpid) 
	asm volatile("eieio; tlbsync; ptesync": : :"memory");

}

EXPORT_SYMBOL(radix__flush_tlb_lpid);



void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,

				unsigned long start, unsigned long end)

{

	radix__flush_tlb_range_psize(vma->vm_mm, start, end, MMU_PAGE_2M);

}

EXPORT_SYMBOL(radix__flush_pmd_tlb_range);