Commit d8bd9f3f authored Sep 22, 2017 by Michael Neuling Committed by Michael Ellerman Sep 26, 2017

powerpc: Handle MCE on POWER9 with only DSISR bit 30 set



On POWER9 DD2.1 and below, it's possible for a paste instruction to
cause a Machine Check Exception (MCE) where only DSISR bit 30 (IBM 33)
is set. This will result in the MCE handler seeing an unknown event,
which triggers linux to crash.

We change this by detecting unknown events caused by load/stores in
the MCE handler and marking them as handled so that we no longer
crash.

An MCE that occurs like this is spurious, so we don't need to do
anything in terms of servicing it. If there is something that needs to
be serviced, the CPU will raise the MCE again with the correct DSISR
so that it can be serviced properly.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
[mpe: Expand comment with details from change log, use normal bit #s]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

parent e19b205b

arch/powerpc/kernel/mce_power.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -624,5 +624,18 @@ long __machine_check_early_realmode_p8(struct pt_regs *regs)

		long __machine_check_early_realmode_p9(struct pt_regs *regs)
		{
		/*
		* On POWER9 DD2.1 and below, it's possible to get a machine check
		* caused by a paste instruction where only DSISR bit 30 is set. This
		* will result in the MCE handler seeing an unknown event and the kernel
		* crashing. An MCE that occurs like this is spurious, so we don't need
		* to do anything in terms of servicing it. If there is something that
		* needs to be serviced, the CPU will raise the MCE again with the
		* correct DSISR so that it can be serviced properly. So detect this
		* case and mark it as handled.
		*/
		if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x40000000)
		return 1;

		return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);
		}