Loading drivers/iommu/arm-smmu.c +22 −20 Original line number Diff line number Diff line Loading @@ -2041,13 +2041,14 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, } else reg |= SCTLR_SHCFG_NSH << SCTLR_SHCFG_SHIFT; if (attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)) { if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_CFRE)) reg &= ~SCTLR_CFRE; if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_STALL)) reg &= ~SCTLR_CFCFG; reg |= SCTLR_HUPCF; } if (attributes & (1 << DOMAIN_ATTR_NO_CFRE)) reg &= ~SCTLR_CFRE; if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_HUPCF)) reg |= SCTLR_HUPCF; if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) && !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1) Loading Loading @@ -3016,16 +3017,20 @@ static int arm_smmu_setup_default_domain(struct device *dev, if (of_property_match_string(np, "qcom,iommu-faults", "stall-disable") >= 0) __arm_smmu_domain_set_attr(domain, DOMAIN_ATTR_CB_STALL_DISABLE, &attr); DOMAIN_ATTR_FAULT_MODEL_NO_STALL, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "HUPCF") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_FAULT_MODEL_HUPCF, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "non-fatal") >= 0) __arm_smmu_domain_set_attr(domain, DOMAIN_ATTR_NON_FATAL_FAULTS, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_NO_CFRE, &attr); /* Default value: disabled */ ret = of_property_read_u32(np, "qcom,iommu-vmid", &val); if (!ret) { Loading Loading @@ -3849,14 +3854,10 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, & (1 << DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT)); ret = 0; break; case DOMAIN_ATTR_CB_STALL_DISABLE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)); ret = 0; break; case DOMAIN_ATTR_NO_CFRE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_NO_CFRE)); case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: case DOMAIN_ATTR_FAULT_MODEL_HUPCF: *((int *)data) = !!(smmu_domain->attributes & (1U << attr)); ret = 0; break; default: Loading Loading @@ -4053,8 +4054,9 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, break; } case DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR: case DOMAIN_ATTR_CB_STALL_DISABLE: case DOMAIN_ATTR_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: case DOMAIN_ATTR_FAULT_MODEL_HUPCF: if (*((int *)data)) smmu_domain->attributes |= 1 << attr; Loading drivers/iommu/iommu-debug.c +6 −2 Original line number Diff line number Diff line Loading @@ -78,8 +78,12 @@ static const char *iommu_debug_attr_to_string(enum iommu_attr attr) return "DOMAIN_ATTR_FAST"; case DOMAIN_ATTR_EARLY_MAP: return "DOMAIN_ATTR_EARLY_MAP"; case DOMAIN_ATTR_CB_STALL_DISABLE: return "DOMAIN_ATTR_CB_STALL_DISABLE"; case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: return "DOMAIN_ATTR_FAULT_MODEL_NO_CFRE"; case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: return "DOMAIN_ATTR_FAULT_MODEL_NO_STALL"; case DOMAIN_ATTR_FAULT_MODEL_HUPCF: return "DOMAIN_ATTR_FAULT_MODEL_HUPCF"; default: return "Unknown attr!"; } Loading include/linux/iommu.h +3 −2 Original line number Diff line number Diff line Loading @@ -171,10 +171,11 @@ enum iommu_attr { DOMAIN_ATTR_EARLY_MAP, DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT, DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT, DOMAIN_ATTR_CB_STALL_DISABLE, DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR, DOMAIN_ATTR_USE_LLC_NWA, DOMAIN_ATTR_NO_CFRE, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, DOMAIN_ATTR_FAULT_MODEL_NO_STALL, DOMAIN_ATTR_FAULT_MODEL_HUPCF, DOMAIN_ATTR_MAX, }; Loading Loading
drivers/iommu/arm-smmu.c +22 −20 Original line number Diff line number Diff line Loading @@ -2041,13 +2041,14 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, } else reg |= SCTLR_SHCFG_NSH << SCTLR_SHCFG_SHIFT; if (attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)) { if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_CFRE)) reg &= ~SCTLR_CFRE; if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_STALL)) reg &= ~SCTLR_CFCFG; reg |= SCTLR_HUPCF; } if (attributes & (1 << DOMAIN_ATTR_NO_CFRE)) reg &= ~SCTLR_CFRE; if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_HUPCF)) reg |= SCTLR_HUPCF; if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) && !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1) Loading Loading @@ -3016,16 +3017,20 @@ static int arm_smmu_setup_default_domain(struct device *dev, if (of_property_match_string(np, "qcom,iommu-faults", "stall-disable") >= 0) __arm_smmu_domain_set_attr(domain, DOMAIN_ATTR_CB_STALL_DISABLE, &attr); DOMAIN_ATTR_FAULT_MODEL_NO_STALL, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "HUPCF") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_FAULT_MODEL_HUPCF, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "non-fatal") >= 0) __arm_smmu_domain_set_attr(domain, DOMAIN_ATTR_NON_FATAL_FAULTS, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) __arm_smmu_domain_set_attr( domain, DOMAIN_ATTR_NO_CFRE, &attr); /* Default value: disabled */ ret = of_property_read_u32(np, "qcom,iommu-vmid", &val); if (!ret) { Loading Loading @@ -3849,14 +3854,10 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, & (1 << DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT)); ret = 0; break; case DOMAIN_ATTR_CB_STALL_DISABLE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)); ret = 0; break; case DOMAIN_ATTR_NO_CFRE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_NO_CFRE)); case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: case DOMAIN_ATTR_FAULT_MODEL_HUPCF: *((int *)data) = !!(smmu_domain->attributes & (1U << attr)); ret = 0; break; default: Loading Loading @@ -4053,8 +4054,9 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, break; } case DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR: case DOMAIN_ATTR_CB_STALL_DISABLE: case DOMAIN_ATTR_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: case DOMAIN_ATTR_FAULT_MODEL_HUPCF: if (*((int *)data)) smmu_domain->attributes |= 1 << attr; Loading
drivers/iommu/iommu-debug.c +6 −2 Original line number Diff line number Diff line Loading @@ -78,8 +78,12 @@ static const char *iommu_debug_attr_to_string(enum iommu_attr attr) return "DOMAIN_ATTR_FAST"; case DOMAIN_ATTR_EARLY_MAP: return "DOMAIN_ATTR_EARLY_MAP"; case DOMAIN_ATTR_CB_STALL_DISABLE: return "DOMAIN_ATTR_CB_STALL_DISABLE"; case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: return "DOMAIN_ATTR_FAULT_MODEL_NO_CFRE"; case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: return "DOMAIN_ATTR_FAULT_MODEL_NO_STALL"; case DOMAIN_ATTR_FAULT_MODEL_HUPCF: return "DOMAIN_ATTR_FAULT_MODEL_HUPCF"; default: return "Unknown attr!"; } Loading
include/linux/iommu.h +3 −2 Original line number Diff line number Diff line Loading @@ -171,10 +171,11 @@ enum iommu_attr { DOMAIN_ATTR_EARLY_MAP, DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT, DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT, DOMAIN_ATTR_CB_STALL_DISABLE, DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR, DOMAIN_ATTR_USE_LLC_NWA, DOMAIN_ATTR_NO_CFRE, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, DOMAIN_ATTR_FAULT_MODEL_NO_STALL, DOMAIN_ATTR_FAULT_MODEL_HUPCF, DOMAIN_ATTR_MAX, }; Loading