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Commit d87bb21e authored by Taniya's avatar Taniya Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add support for dummy clocks for bengal 

Add dummy clock and GDSC nodes for Bengal device.

Change-Id: Icf93205d4c088e5fb9593826b78259611c1d760b
parent 4d9fde18

qcom/bengal-gdsc.dtsi

0 → 100644
+75 −0
Original line number Diff line number Diff line 
&soc {

	/* GDSCs in DISPCC*/

	mdss_core_gdsc: qcom,gdsc@5f03000 {

		compatible = "regulator-fixed";

		regulator-name = "mdss_core_gdsc";

		reg = <0x5f03000 0x4>;

		status = "disabled";

	};



	/* GDSCs in GCC*/

	gcc_camss_top_gdsc: qcom,gdsc@1458004 {

		compatible = "regulator-fixed";

		regulator-name = "gcc_camss_top_gdsc";

		reg = <0x1458004 0x4>;

		status = "disabled";

	};



	gcc_ufs_phy_gdsc: qcom,gdsc@1445004 {

		compatible = "regulator-fixed";

		regulator-name = "gcc_ufs_phy_gdsc";

		reg = <0x1445004 0x4>;

		status = "disabled";

	};



	gcc_usb30_prim_gdsc: qcom,gdsc@141a004 {

		compatible = "regulator-fixed";

		regulator-name = "gcc_usb30_prim_gdsc";

		reg = <0x141a004 0x4>;

		status = "disabled";

	};



	gcc_vcodec0_gdsc: qcom,gdsc@1458098 {

		compatible = "regulator-fixed";

		regulator-name = "gcc_vcodec0_gdsc";

		reg = <0x1458098 0x4>;

		status = "disabled";

	};



	gcc_venus_gdsc: qcom,gdsc@145807c {

		compatible = "regulator-fixed";

		regulator-name = "gcc_venus_gdsc";

		reg = <0x145807c 0x4>;

		status = "disabled";

	};



	/* GDSCs in GPUCC*/

	gpu_cx_gdsc: qcom,gdsc@599106c {

		compatible = "regulator-fixed";

		regulator-name = "gpu_cx_gdsc";

		reg = <0x599106c 0x4>;

		status = "disabled";

	};



	gpu_gx_gdsc: qcom,gdsc@599100c {

		compatible = "regulator-fixed";

		regulator-name = "gpu_gx_gdsc";

		reg = <0x599100c 0x4>;

		status = "disabled";

	};



	gpu_cx_hw_ctrl: syscon@5991540 {

		compatible = "syscon";

		reg = <0x5991540 0x4>;

	};



	gpu_gx_sw_reset: syscon@5991008 {

		compatible = "syscon";

		reg = <0x5991008 0x4>;

	};



	gpu_gx_domain_addr: syscon@5991508 {

		compatible = "syscon";

		reg = <0x5991508 0x4>;

	};

};

qcom/bengal.dtsi

+102 −0
Original line number Diff line number Diff line 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/clock/qcom,dispcc-bengal.h>

#include <dt-bindings/clock/qcom,gcc-bengal.h>

#include <dt-bindings/clock/qcom,gpucc-bengal.h>



/ {

	model = "Qualcomm Technologies, Inc. BENGAL";
@@ -542,4 +546,102 @@ 
			qcom,dump-id = <0x27>;

		};

	};



	clocks {

		xo_board: xo_board {

			compatible = "fixed-clock";

			clock-frequency = <19200000>;

			clock-output-names = "xo_board";

			#clock-cells = <0>;

		};



		sleep_clk: sleep_clk {

			compatible = "fixed-clock";

			clock-frequency = <32764>;

			clock-output-names = "sleep_clk";

			#clock-cells = <0>;

		};

	};



	bi_tcxo: bi_tcxo {

		compatible = "fixed-factor-clock";

		clocks = <&xo_board>;

		clock-mul = <1>;

		clock-div = <1>;

		#clock-cells = <0>;

	};



	bi_tcxo_ao: bi_tcxo_ao {

		compatible = "fixed-factor-clock";

		clocks = <&xo_board>;

		clock-mul = <1>;

		clock-div = <1>;

		#clock-cells = <0>;

	};



	rpmcc: qcom,rpmcc {

		compatible = "qcom,dummycc";

		clock-output-names = "rpmcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	dispcc: qcom,dispcc {

		compatible = "qcom,dummycc";

		clock-output-names = "dispcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	gcc: qcom,gcc {

		compatible = "qcom,dummycc";

		clock-output-names = "gcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	gpucc: qcom,gpucc {

		compatible = "qcom,dummycc";

		clock-output-names = "gpucc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

};



#include "bengal-gdsc.dtsi"



&mdss_core_gdsc {

	qcom,support-hw-trigger;

	status = "ok";

};



&gcc_venus_gdsc {

	qcom,support-hw-trigger;

	status = "ok";

};



&gcc_vcodec0_gdsc {

	status = "ok";

};



&gcc_usb30_prim_gdsc {

	status = "ok";

};



&gcc_camss_top_gdsc {

	status = "ok";

};



&gcc_ufs_phy_gdsc {

	status = "ok";

};



&gpu_cx_gdsc {

	status = "ok";

};



&gpu_gx_gdsc {

	status = "ok";

};