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Commit d86e63e1 authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Chen-Yu Tsai
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arm64: allwinner: h5: fix pinctrl IRQs 



The pin controller of H5 has three IRQs at the chip's GIC, which
represents three banks of pinctrl IRQs. However, the device tree used to
miss the third IRQ of the pin controller, which makes the PG bank IRQ
not usable.

Add the missing IRQ to the pinctrl node.

Fixes: 4e36de17 ("arm64: allwinner: h5: add Allwinner H5 .dtsi")
Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 56a91550

arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -120,5 +120,8 @@ 
};



&pio {

	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

	compatible = "allwinner,sun50i-h5-pinctrl";

};