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Commit d861ca23 authored by Changbin Du's avatar Changbin Du Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Use standard pte bit definition 



GTT entry has similar format with the CPU PTE. We'd prefer named macro
instead of hardcode.

Signed-off-by: default avatarChangbin Du <changbin.du@intel.com>
Reviewed-by: default avatarZhi Wang <zhi.a.wang@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent e6e9c46f

drivers/gpu/drm/i915/gvt/gtt.c

+11 −11
Original line number Original line Diff line number Diff line
@@ -346,11 +346,11 @@ static unsigned long gen8_gtt_get_pfn(struct intel_gvt_gtt_entry *e) 
	unsigned long pfn;

	unsigned long pfn;





	if (e->type == GTT_TYPE_PPGTT_PTE_1G_ENTRY)

	if (e->type == GTT_TYPE_PPGTT_PTE_1G_ENTRY)

		pfn = (e->val64 & ADDR_1G_MASK) >> 12;

		pfn = (e->val64 & ADDR_1G_MASK) >> PAGE_SHIFT;

	else if (e->type == GTT_TYPE_PPGTT_PTE_2M_ENTRY)

	else if (e->type == GTT_TYPE_PPGTT_PTE_2M_ENTRY)

		pfn = (e->val64 & ADDR_2M_MASK) >> 12;

		pfn = (e->val64 & ADDR_2M_MASK) >> PAGE_SHIFT;

	else

	else

		pfn = (e->val64 & ADDR_4K_MASK) >> 12;

		pfn = (e->val64 & ADDR_4K_MASK) >> PAGE_SHIFT;

	return pfn;

	return pfn;

}

}
@@ -358,16 +358,16 @@ static void gen8_gtt_set_pfn(struct intel_gvt_gtt_entry *e, unsigned long pfn) 
{

{

	if (e->type == GTT_TYPE_PPGTT_PTE_1G_ENTRY) {

	if (e->type == GTT_TYPE_PPGTT_PTE_1G_ENTRY) {

		e->val64 &= ~ADDR_1G_MASK;

		e->val64 &= ~ADDR_1G_MASK;

		pfn &= (ADDR_1G_MASK >> 12);

		pfn &= (ADDR_1G_MASK >> PAGE_SHIFT);

	} else if (e->type == GTT_TYPE_PPGTT_PTE_2M_ENTRY) {

	} else if (e->type == GTT_TYPE_PPGTT_PTE_2M_ENTRY) {

		e->val64 &= ~ADDR_2M_MASK;

		e->val64 &= ~ADDR_2M_MASK;

		pfn &= (ADDR_2M_MASK >> 12);

		pfn &= (ADDR_2M_MASK >> PAGE_SHIFT);

	} else {

	} else {

		e->val64 &= ~ADDR_4K_MASK;

		e->val64 &= ~ADDR_4K_MASK;

		pfn &= (ADDR_4K_MASK >> 12);

		pfn &= (ADDR_4K_MASK >> PAGE_SHIFT);

	}

	}





	e->val64 |= (pfn << 12);

	e->val64 |= (pfn << PAGE_SHIFT);

}

}





static bool gen8_gtt_test_pse(struct intel_gvt_gtt_entry *e)

static bool gen8_gtt_test_pse(struct intel_gvt_gtt_entry *e)
@@ -377,7 +377,7 @@ static bool gen8_gtt_test_pse(struct intel_gvt_gtt_entry *e) 
		return false;

		return false;





	e->type = get_entry_type(e->type);

	e->type = get_entry_type(e->type);

	if (!(e->val64 & BIT(7)))

	if (!(e->val64 & _PAGE_PSE))

		return false;

		return false;





	e->type = get_pse_type(e->type);

	e->type = get_pse_type(e->type);
@@ -395,17 +395,17 @@ static bool gen8_gtt_test_present(struct intel_gvt_gtt_entry *e) 
			|| e->type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY)

			|| e->type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY)

		return (e->val64 != 0);

		return (e->val64 != 0);

	else

	else

		return (e->val64 & BIT(0));

		return (e->val64 & _PAGE_PRESENT);

}

}





static void gtt_entry_clear_present(struct intel_gvt_gtt_entry *e)

static void gtt_entry_clear_present(struct intel_gvt_gtt_entry *e)

{

{

	e->val64 &= ~BIT(0);

	e->val64 &= ~_PAGE_PRESENT;

}

}





static void gtt_entry_set_present(struct intel_gvt_gtt_entry *e)

static void gtt_entry_set_present(struct intel_gvt_gtt_entry *e)

{

{

	e->val64 |= BIT(0);

	e->val64 |= _PAGE_PRESENT;

}

}





/*

/*