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Commit d83b26e0 authored by Bhumika Goyal's avatar Bhumika Goyal Committed by Thierry Reding
Browse files

clk: tegra: Make tegra_clk_pll_params __ro_after_init 



These structures are only passed to the functions tegra_clk_register_pll,
tegra_clk_register_pll{e/u} or tegra_periph_clk_init during the init
phase. These functions modify the structures only during the init phase
and after that the structures are never modified. Therefore, make them
__ro_after_init.

Signed-off-by: default avatarBhumika Goyal <bhumirks@gmail.com>
Acked-By: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent bc2e4d29

drivers/clk/tegra/clk-tegra30.c

+8 −8
Original line number Diff line number Diff line
@@ -359,7 +359,7 @@ static struct tegra_clk_pll_freq_table pll_e_freq_table[] = { 
};



/* PLL parameters */

static struct tegra_clk_pll_params pll_c_params = {

static struct tegra_clk_pll_params pll_c_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 31000000,

	.cf_min = 1000000,
@@ -388,7 +388,7 @@ static struct div_nmp pllm_nmp = { 
	.override_divp_shift = 15,

};



static struct tegra_clk_pll_params pll_m_params = {

static struct tegra_clk_pll_params pll_m_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 31000000,

	.cf_min = 1000000,
@@ -409,7 +409,7 @@ static struct tegra_clk_pll_params pll_m_params = { 
		 TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_FIXED,

};



static struct tegra_clk_pll_params pll_p_params = {

static struct tegra_clk_pll_params pll_p_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 31000000,

	.cf_min = 1000000,
@@ -444,7 +444,7 @@ static struct tegra_clk_pll_params pll_a_params = { 
		 TEGRA_PLL_HAS_LOCK_ENABLE,

};



static struct tegra_clk_pll_params pll_d_params = {

static struct tegra_clk_pll_params pll_d_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 40000000,

	.cf_min = 1000000,
@@ -461,7 +461,7 @@ static struct tegra_clk_pll_params pll_d_params = { 
		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,

};



static struct tegra_clk_pll_params pll_d2_params = {

static struct tegra_clk_pll_params pll_d2_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 40000000,

	.cf_min = 1000000,
@@ -478,7 +478,7 @@ static struct tegra_clk_pll_params pll_d2_params = { 
		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,

};



static struct tegra_clk_pll_params pll_u_params = {

static struct tegra_clk_pll_params pll_u_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 40000000,

	.cf_min = 1000000,
@@ -496,7 +496,7 @@ static struct tegra_clk_pll_params pll_u_params = { 
		 TEGRA_PLL_HAS_LOCK_ENABLE,

};



static struct tegra_clk_pll_params pll_x_params = {

static struct tegra_clk_pll_params pll_x_params __ro_after_init = {

	.input_min = 2000000,

	.input_max = 31000000,

	.cf_min = 1000000,
@@ -513,7 +513,7 @@ static struct tegra_clk_pll_params pll_x_params = { 
		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,

};



static struct tegra_clk_pll_params pll_e_params = {

static struct tegra_clk_pll_params pll_e_params __ro_after_init = {

	.input_min = 12000000,

	.input_max = 216000000,

	.cf_min = 12000000,