Loading arch/arm64/boot/dts/qcom/lito.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -1230,7 +1230,6 @@ compatible = "qcom,llcc-v1"; reg = <0x9200000 0xd0000> , <0x9600000 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; cap-based-alloc-and-pwr-collapse; LLCC_1: llcc_1_dcache { Loading Loading
arch/arm64/boot/dts/qcom/lito.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -1230,7 +1230,6 @@ compatible = "qcom,llcc-v1"; reg = <0x9200000 0xd0000> , <0x9600000 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; cap-based-alloc-and-pwr-collapse; LLCC_1: llcc_1_dcache { Loading