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Commit d6a841a4 authored by Dave Airlie's avatar Dave Airlie
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Merge tag 'drm-intel-next-fixes-2018-02-01' of...

Merge tag 'drm-intel-next-fixes-2018-02-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Fixes for GPU hangs and other bugs around hangcheck and result;
Fix for regression on suspend case with vgaswitcheroo;
Fixes for eDP and HDMI blank screens
Fix for protecting WC allocation to avoid overflow on page vec;
Cleanup around unpublished GLK firmware blobs, and other small fixes.

This also contains GVT pull request mostly with regression
fixes on vGPU display dmabuf, mmio switch and other misc changes.

* tag 'drm-intel-next-fixes-2018-02-01' of git://anongit.freedesktop.org/drm/drm-intel: (21 commits)
  drm/i915/ppgtt: Pin page directories before allocation
  drm/i915: Always run hangcheck while the GPU is busy
  Revert "drm/i915: mark all device info struct with __initconst"
  drm/i915/edp: Do not do link training fallback or prune modes on EDP
  drm/i915: Check for fused or unused pipes
  drm/i915: Protect WC stash allocation against direct reclaim
  drm/i915: Only attempt to scan the requested number of shrinker slabs
  drm/i915: Always call to intel_display_set_init_power() in resume_early.
  drm/i915/gvt: cancel scheduler timer when no vGPU exists
  drm/i915/gvt: cancel virtual vblank timer when no vGPU exists
  drm/i915/gvt: Keep obj->dma_buf link NULL during exporting
  drm/i915/pmu: Reconstruct active state on starting busy-stats
  drm/i915: Stop getting the fault address from RING_FAULT_REG
  drm/i915/guc: Add uc_fini_wq in gem_init unwind path
  drm/i915: Fix using BIT_ULL() vs. BIT() for power domain masks
  drm/i915: Try EDID bitbanging on HDMI after failed read
  drm/i915/glk: Disable Guc and HuC on GLK
  drm/i915/gvt: Do not use I915_NUM_ENGINES to iterate over the mocs regs array
  drm/i915/gvt: validate gfn before set shadow page entry
  drm/i915/gvt: add PLANE_KEYMAX regs to mmio track list
  ...
parents 24b8ef69 751b01cb
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+0 −1
Original line number Diff line number Diff line
@@ -472,7 +472,6 @@ int intel_vgpu_get_dmabuf(struct intel_vgpu *vgpu, unsigned int dmabuf_id)
		ret = PTR_ERR(dmabuf);
		goto out_free_gem;
	}
	obj->base.dma_buf = dmabuf;

	i915_gem_object_put(obj);

+19 −5
Original line number Diff line number Diff line
@@ -997,9 +997,11 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se,
static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
{
	struct intel_vgpu *vgpu = spt->vgpu;
	struct intel_gvt *gvt = vgpu->gvt;
	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
	struct intel_vgpu_ppgtt_spt *s;
	struct intel_gvt_gtt_entry se, ge;
	unsigned long i;
	unsigned long gfn, i;
	int ret;

	trace_spt_change(spt->vgpu->id, "born", spt,
@@ -1007,9 +1009,10 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)

	if (gtt_type_is_pte_pt(spt->shadow_page.type)) {
		for_each_present_guest_entry(spt, &ge, i) {
			ret = gtt_entry_p2m(vgpu, &ge, &se);
			if (ret)
				goto fail;
			gfn = ops->get_pfn(&ge);
			if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn) ||
				gtt_entry_p2m(vgpu, &ge, &se))
				ops->set_pfn(&se, gvt->gtt.scratch_mfn);
			ppgtt_set_shadow_entry(spt, &se, i);
		}
		return 0;
@@ -1906,7 +1909,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
	struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
	unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;
	unsigned long gma;
	unsigned long gma, gfn;
	struct intel_gvt_gtt_entry e, m;
	int ret;

@@ -1925,6 +1928,16 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
			bytes);

	if (ops->test_present(&e)) {
		gfn = ops->get_pfn(&e);

		/* one PTE update may be issued in multiple writes and the
		 * first write may not construct a valid gfn
		 */
		if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) {
			ops->set_pfn(&m, gvt->gtt.scratch_mfn);
			goto out;
		}

		ret = gtt_entry_p2m(vgpu, &e, &m);
		if (ret) {
			gvt_vgpu_err("fail to translate guest gtt entry\n");
@@ -1939,6 +1952,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
		ops->set_pfn(&m, gvt->gtt.scratch_mfn);
	}

out:
	ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index);
	gtt_invalidate(gvt->dev_priv);
	ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index);
+3 −0
Original line number Diff line number Diff line
@@ -2843,6 +2843,9 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
	MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B)), D_SKL_PLUS);
	MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C)), D_SKL_PLUS);
+1 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ struct intel_gvt_mpt {
	int (*set_opregion)(void *vgpu);
	int (*get_vfio_device)(void *vgpu);
	void (*put_vfio_device)(void *vgpu);
	bool (*is_valid_gfn)(unsigned long handle, unsigned long gfn);
};

extern struct intel_gvt_mpt xengt_mpt;
+16 −0
Original line number Diff line number Diff line
@@ -1570,6 +1570,21 @@ static unsigned long kvmgt_virt_to_pfn(void *addr)
	return PFN_DOWN(__pa(addr));
}

static bool kvmgt_is_valid_gfn(unsigned long handle, unsigned long gfn)
{
	struct kvmgt_guest_info *info;
	struct kvm *kvm;

	if (!handle_valid(handle))
		return false;

	info = (struct kvmgt_guest_info *)handle;
	kvm = info->kvm;

	return kvm_is_visible_gfn(kvm, gfn);

}

struct intel_gvt_mpt kvmgt_mpt = {
	.host_init = kvmgt_host_init,
	.host_exit = kvmgt_host_exit,
@@ -1585,6 +1600,7 @@ struct intel_gvt_mpt kvmgt_mpt = {
	.set_opregion = kvmgt_set_opregion,
	.get_vfio_device = kvmgt_get_vfio_device,
	.put_vfio_device = kvmgt_put_vfio_device,
	.is_valid_gfn = kvmgt_is_valid_gfn,
};
EXPORT_SYMBOL_GPL(kvmgt_mpt);

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