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Commit d62a107a authored by Joao Pinto's avatar Joao Pinto Committed by David S. Miller
Browse files

net: stmmac: prepare dma interrupt treatment for multiple queues 



This patch prepares DMA interrupts treatment for multiple queues.

Signed-off-by: default avatarJoao Pinto <jpinto@synopsys.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4e593262

drivers/net/ethernet/stmicro/stmmac/common.h

+1 −1
Original line number Diff line number Diff line
@@ -438,7 +438,7 @@ struct stmmac_dma_ops { 
	void (*start_rx)(void __iomem *ioaddr, u32 chan);

	void (*stop_rx)(void __iomem *ioaddr, u32 chan);

	int (*dma_interrupt) (void __iomem *ioaddr,

			      struct stmmac_extra_stats *x);

			      struct stmmac_extra_stats *x, u32 chan);

	/* If supported then get the optional core features */

	void (*get_hw_feature)(void __iomem *ioaddr,

			       struct dma_features *dma_cap);

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h

+1 −1
Original line number Diff line number Diff line
@@ -193,7 +193,7 @@ void dwmac4_dma_stop_tx(void __iomem *ioaddr, u32 chan); 
void dwmac4_dma_start_rx(void __iomem *ioaddr, u32 chan);

void dwmac4_dma_stop_rx(void __iomem *ioaddr, u32 chan);

int dwmac4_dma_interrupt(void __iomem *ioaddr,

			 struct stmmac_extra_stats *x);

			 struct stmmac_extra_stats *x, u32 chan);

void dwmac4_set_rx_ring_len(void __iomem *ioaddr, u32 len);

void dwmac4_set_tx_ring_len(void __iomem *ioaddr, u32 len);

void dwmac4_set_rx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan);

drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c

+4 −4
Original line number Diff line number Diff line
@@ -122,11 +122,11 @@ void dwmac4_disable_dma_irq(void __iomem *ioaddr, u32 chan) 
}



int dwmac4_dma_interrupt(void __iomem *ioaddr,

			 struct stmmac_extra_stats *x)

			 struct stmmac_extra_stats *x, u32 chan)

{

	int ret = 0;



	u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(0));

	u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(chan));



	/* ABNORMAL interrupts */

	if (unlikely(intr_status & DMA_CHAN_STATUS_AIS)) {
@@ -153,7 +153,7 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, 
		if (likely(intr_status & DMA_CHAN_STATUS_RI)) {

			u32 value;



			value = readl(ioaddr + DMA_CHAN_INTR_ENA(STMMAC_CHAN0));

			value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan));

			/* to schedule NAPI on real RIE event. */

			if (likely(value & DMA_CHAN_INTR_ENA_RIE)) {

				x->rx_normal_irq_n++;
@@ -172,7 +172,7 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, 
	 * status [21-0] expect reserved bits [5-3]

	 */

	writel((intr_status & 0x3fffc7),

	       ioaddr + DMA_CHAN_STATUS(STMMAC_CHAN0));

	       ioaddr + DMA_CHAN_STATUS(chan));



	return ret;

}

drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h

+2 −1
Original line number Diff line number Diff line
@@ -143,7 +143,8 @@ void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan); 
void dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan);

void dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan);

void dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan);

int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x);

int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x,

			u32 chan);

int dwmac_dma_reset(void __iomem *ioaddr);



#endif /* __DWMAC_DMA_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c

+1 −1
Original line number Diff line number Diff line
@@ -156,7 +156,7 @@ static void show_rx_process_state(unsigned int status) 
#endif



int dwmac_dma_interrupt(void __iomem *ioaddr,

			struct stmmac_extra_stats *x)

			struct stmmac_extra_stats *x, u32 chan)

{

	int ret = 0;

	/* read the status register (CSR5) */