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Commit d619500a authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
Browse files

sh: rework intc2 code 



The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.

This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.

One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.

Signed-off-by: default avatarMagnus Damm <damm@igel.co.jp>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent d3efbdd6

arch/sh/boards/se/7780/irq.c

+14 −31
Original line number Original line Diff line number Diff line
@@ -16,28 +16,6 @@ 
#include <asm/io.h>

#include <asm/io.h>

#include <asm/se7780.h>

#include <asm/se7780.h>





#define INTC_INTMSK0             0xFFD00044

#define INTC_INTMSKCLR0          0xFFD00064



static void disable_se7780_irq(unsigned int irq)

{

	struct intc2_data *p = get_irq_chip_data(irq);

	ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);

}



static void enable_se7780_irq(unsigned int irq)

{

	struct intc2_data *p = get_irq_chip_data(irq);

	ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);

}



static struct irq_chip se7780_irq_chip __read_mostly = {

	.name           = "SE7780",

	.mask           = disable_se7780_irq,

	.unmask         = enable_se7780_irq,

	.mask_ack       = disable_se7780_irq,

};



static struct intc2_data intc2_irq_table[] = {

static struct intc2_data intc2_irq_table[] = {

	{ 2,  0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */

	{ 2,  0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */

	{ 4,  0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */

	{ 4,  0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
@@ -51,13 +29,24 @@ static struct intc2_data intc2_irq_table[] = { 
	{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */

	{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */

};

};





static struct intc2_desc intc2_irq_desc __read_mostly = {

	.prio_base	= 0, /* N/A */

	.msk_base	= 0xffd00044,

	.mskclr_base	= 0xffd00064,



	.intc2_data	= intc2_irq_table,

	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),



	.chip = {

		.name	= "INTC2-se7780",

	},

};



/*

/*

 * Initialize IRQ setting

 * Initialize IRQ setting

 */

 */

void __init init_se7780_IRQ(void)

void __init init_se7780_IRQ(void)

{

{

	int i ;



	/* enable all interrupt at FPGA */

	/* enable all interrupt at FPGA */

	ctrl_outw(0, FPGA_INTMSK1);

	ctrl_outw(0, FPGA_INTMSK1);

	/* mask SM501 interrupt */

	/* mask SM501 interrupt */
@@ -79,11 +68,5 @@ void __init init_se7780_IRQ(void) 
	/* FPGA + 0x0A */

	/* FPGA + 0x0A */

	ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);

	ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);





	for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) {

	register_intc2_controller(&intc2_irq_desc);

		disable_irq_nosync(intc2_irq_table[i].irq);

		set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,

			handle_level_irq, "level");

		set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );

		disable_se7780_irq(intc2_irq_table[i].irq);

	}

}
 
}

arch/sh/kernel/cpu/irq/intc2.c

+27 −31
Original line number Original line Diff line number Diff line
@@ -14,36 +14,26 @@ 
#include <linux/interrupt.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/io.h>





#if defined(CONFIG_CPU_SUBTYPE_SH7760)

static inline struct intc2_desc *get_intc2_desc(unsigned int irq)

#define INTC2_BASE	0xfe080000

{

#define INTC2_INTMSK	(INTC2_BASE + 0x40)

	struct irq_chip *chip = get_irq_chip(irq);

#define INTC2_INTMSKCLR	(INTC2_BASE + 0x60)

	return (void *)((char *)chip - offsetof(struct intc2_desc, chip));

#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \

}

      defined(CONFIG_CPU_SUBTYPE_SH7785)

#define INTC2_BASE	0xffd40000

#define INTC2_INTMSK	(INTC2_BASE + 0x38)

#define INTC2_INTMSKCLR	(INTC2_BASE + 0x3c)

#endif





static void disable_intc2_irq(unsigned int irq)

static void disable_intc2_irq(unsigned int irq)

{

{

	struct intc2_data *p = get_irq_chip_data(irq);

	struct intc2_data *p = get_irq_chip_data(irq);

	ctrl_outl(1 << p->msk_shift, INTC2_INTMSK + p->msk_offset);

	struct intc2_desc *d = get_intc2_desc(irq);

	ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset);

}

}





static void enable_intc2_irq(unsigned int irq)

static void enable_intc2_irq(unsigned int irq)

{

{

	struct intc2_data *p = get_irq_chip_data(irq);

	struct intc2_data *p = get_irq_chip_data(irq);

	ctrl_outl(1 << p->msk_shift, INTC2_INTMSKCLR + p->msk_offset);

	struct intc2_desc *d = get_intc2_desc(irq);

	ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset);

}

}





static struct irq_chip intc2_irq_chip = {

	.name		= "INTC2",

	.mask		= disable_intc2_irq,

	.unmask		= enable_intc2_irq,

	.mask_ack	= disable_intc2_irq,

};



/*

/*

 * Setup an INTC2 style interrupt.

 * Setup an INTC2 style interrupt.

 * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,

 * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
@@ -56,30 +46,36 @@ static struct irq_chip intc2_irq_chip = { 
 *

 *

 * in the intc2_data table.

 * in the intc2_data table.

 */

 */

void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)

void register_intc2_controller(struct intc2_desc *desc)

{

{

	int i;

	int i;





	for (i = 0; i < nr_irqs; i++) {

	desc->chip.mask = disable_intc2_irq;

	desc->chip.unmask = enable_intc2_irq;

	desc->chip.mask_ack = disable_intc2_irq;



	for (i = 0; i < desc->nr_irqs; i++) {

		unsigned long ipr, flags;

		unsigned long ipr, flags;

		struct intc2_data *p = table + i;

		struct intc2_data *p = desc->intc2_data + i;





		disable_irq_nosync(p->irq);

		disable_irq_nosync(p->irq);





		if (desc->prio_base) {

			/* Set the priority level */

			/* Set the priority level */

			local_irq_save(flags);

			local_irq_save(flags);





		ipr = ctrl_inl(INTC2_BASE + p->ipr_offset);

			ipr = ctrl_inl(desc->prio_base + p->ipr_offset);

			ipr &= ~(0xf << p->ipr_shift);

			ipr &= ~(0xf << p->ipr_shift);

			ipr |= p->priority << p->ipr_shift;

			ipr |= p->priority << p->ipr_shift;

		ctrl_outl(ipr, INTC2_BASE + p->ipr_offset);

			ctrl_outl(ipr, desc->prio_base + p->ipr_offset);





			local_irq_restore(flags);

			local_irq_restore(flags);

		}





		set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,

		set_irq_chip_and_handler_name(p->irq, &desc->chip,

					      handle_level_irq, "level");

					      handle_level_irq, "level");

		set_irq_chip_data(p->irq, p);

		set_irq_chip_data(p->irq, p);





		enable_intc2_irq(p->irq);

		disable_intc2_irq(p->irq);

	}

	}

}
 
}

arch/sh/kernel/cpu/sh4/setup-sh7760.c

+14 −1
Original line number Original line Diff line number Diff line
@@ -96,6 +96,19 @@ static struct intc2_data intc2_irq_table[] = { 
	{109,12,  0, 4,  0,  3},	/* CMTI */

	{109,12,  0, 4,  0,  3},	/* CMTI */

};

};





static struct intc2_desc intc2_irq_desc __read_mostly = {

	.prio_base	= 0xfe080000,

	.msk_base	= 0xfe080040,

	.mskclr_base	= 0xfe080060,



	.intc2_data	= intc2_irq_table,

	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),



	.chip = {

		.name	= "INTC2-sh7760",

	},

};



static struct ipr_data sh7760_ipr_map[] = {

static struct ipr_data sh7760_ipr_map[] = {

	/* IRQ, IPR-idx, shift, priority */

	/* IRQ, IPR-idx, shift, priority */

	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/

	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
@@ -143,7 +156,7 @@ unsigned int map_ipridx_to_addr(int idx) 




void __init init_IRQ_intc2(void)

void __init init_IRQ_intc2(void)

{

{

	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));

	register_intc2_controller(&intc2_irq_desc);

}

}





void __init  init_IRQ_ipr(void)

void __init  init_IRQ_ipr(void)

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

+14 −1
Original line number Original line Diff line number Diff line
@@ -102,7 +102,20 @@ static struct intc2_data intc2_irq_table[] = { 
	{ 68, 0x14,  8, 0, 18, 2 },	/* PCIC4 */

	{ 68, 0x14,  8, 0, 18, 2 },	/* PCIC4 */

};

};





static struct intc2_desc intc2_irq_desc __read_mostly = {

	.prio_base	= 0xffd40000,

	.msk_base	= 0xffd40038,

	.mskclr_base	= 0xffd4003c,



	.intc2_data	= intc2_irq_table,

	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),



	.chip = {

		.name	= "INTC2-sh7780",

	},

};



void __init init_IRQ_intc2(void)

void __init init_IRQ_intc2(void)

{

{

	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));

	register_intc2_controller(&intc2_irq_desc);

}
 
}

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

+15 −1
Original line number Original line Diff line number Diff line
@@ -97,7 +97,21 @@ static struct intc2_data intc2_irq_table[] = { 
	{ 60, 12, 16, 0, 7, 3 },	/* SCIF5 ERI, RXI, BRI, TXI */

	{ 60, 12, 16, 0, 7, 3 },	/* SCIF5 ERI, RXI, BRI, TXI */

};

};





static struct intc2_desc intc2_irq_desc __read_mostly = {

	.prio_base	= 0xffd40000,

	.msk_base	= 0xffd40038,

	.mskclr_base	= 0xffd4003c,



	.intc2_data	= intc2_irq_table,

	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),



	.chip = {

		.name	= "INTC2-sh7785",

	},

};



void __init init_IRQ_intc2(void)

void __init init_IRQ_intc2(void)

{

{

	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));

	register_intc2_controller(&intc2_irq_desc);

}

}