Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d5c52922 authored by Matthieu Castet's avatar Matthieu Castet Committed by Ben Dooks
Browse files

[ARM] S3C2412: Correct parents for EREFCLK and UREFCLK 



For s3c2412, set parent for clk_erefclk and clk_urefclk.
This allow for example to use xtal or extclk for i2s clock.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarMatthieu Castet <matthieu.castet@parrot.com>
parent 9c3871ca

arch/arm/mach-s3c2412/clock.c

+11 −2
Original line number Diff line number Diff line
@@ -631,6 +631,17 @@ static struct clk_init clks_src[] __initdata = { 
		.bit	= S3C2412_CLKSRC_USBCLK_HCLK,

		.src_0	= &clk_usysclk,

		.src_1	= &clk_h,

	/* here we assume  OM[4] select xtal */

	}, {

		.clk	= &clk_erefclk,

		.bit	= S3C2412_CLKSRC_EREFCLK_EXTCLK,

		.src_0	= &clk_xtal,

		.src_1	= &clk_ext,

	}, {

		.clk	= &clk_urefclk,

		.bit	= S3C2412_CLKSRC_UREFCLK_EXTCLK,

		.src_0	= &clk_xtal,

		.src_1	= &clk_ext,

	},

};
@@ -666,8 +677,6 @@ static void __init s3c2412_clk_initparents(void) 
static struct clk *clks[] __initdata = {

	&clk_ext,

	&clk_usb_bus,

	&clk_erefclk,

	&clk_urefclk,

	&clk_mrefclk,

	&clk_armclk,

};

include/asm-arm/arch-s3c2410/regs-clock.h

+2 −0
Original line number Diff line number Diff line
@@ -189,6 +189,8 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) 
#define S3C2412_CLKSRC_I2SCLK_MPLL		(1<<9)

#define S3C2412_CLKSRC_USBCLK_HCLK		(1<<10)

#define S3C2412_CLKSRC_CAMCLK_HCLK		(1<<11)

#define S3C2412_CLKSRC_UREFCLK_EXTCLK	(1<<12)

#define S3C2412_CLKSRC_EREFCLK_EXTCLK	(1<<14)



#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */