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Commit d4d1cda6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'xtensa-next-20130710' of git://github.com/czankel/xtensa-linux 

Pull Xtensa updates from Chris Zankel.

* tag 'xtensa-next-20130710' of git://github.com/czankel/xtensa-linux: (22 commits)
  xtensa: remove the second argument of __bio_kmap_atomic()
  xtensa: add static function tracer support
  xtensa: Flat DeviceTree copy not future-safe
  xtensa: check TLB sanity on return to userspace
  xtensa: adjust boot parameters address when INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is selected
  xtensa: bootparams: fix typo
  xtensa: tell git to ignore generated .dtb files
  xtensa: ccount based sched_clock
  xtensa: ccount based clockevent implementation
  xtensa: consolidate ccount access routines
  xtensa: cleanup ccount frequency tracking
  xtensa: timex.h: remove unused symbols
  xtensa: tell git to ignore copied zlib source files
  xtensa: fix section mismatch in pcibios_fixup_bus
  xtensa: ISS: fix section mismatch in iss_net_setup
  arch: xtensa: include: asm: compiling issue, need cmpxchg64() defined.
  xtensa: xtfpga: fix section mismatch
  xtensa: remove unused platform_init_irq()
  xtensa: tell git to ignore generated files
  xtensa: flush TLB entries for pages of non-current mm correctly
  ...
parents 7728f036 0eb5afb3

arch/xtensa/Kconfig

+3 −0
Original line number Original line Diff line number Diff line
@@ -6,10 +6,12 @@ config XTENSA 
	select ARCH_WANT_FRAME_POINTERS

	select ARCH_WANT_FRAME_POINTERS

	select HAVE_IDE

	select HAVE_IDE

	select GENERIC_ATOMIC64

	select GENERIC_ATOMIC64

	select GENERIC_CLOCKEVENTS

	select HAVE_GENERIC_HARDIRQS

	select HAVE_GENERIC_HARDIRQS

	select VIRT_TO_BUS

	select VIRT_TO_BUS

	select GENERIC_IRQ_SHOW

	select GENERIC_IRQ_SHOW

	select GENERIC_CPU_DEVICES

	select GENERIC_CPU_DEVICES

	select GENERIC_SCHED_CLOCK

	select MODULES_USE_ELF_RELA

	select MODULES_USE_ELF_RELA

	select GENERIC_PCI_IOMAP

	select GENERIC_PCI_IOMAP

	select ARCH_WANT_IPC_PARSE_VERSION

	select ARCH_WANT_IPC_PARSE_VERSION
@@ -17,6 +19,7 @@ config XTENSA 
	select CLONE_BACKWARDS

	select CLONE_BACKWARDS

	select IRQ_DOMAIN

	select IRQ_DOMAIN

	select HAVE_OPROFILE

	select HAVE_OPROFILE

	select HAVE_FUNCTION_TRACER

	help

	help

	  Xtensa processors are 32-bit RISC machines designed by Tensilica

	  Xtensa processors are 32-bit RISC machines designed by Tensilica

	  primarily for embedded systems.  These processors are both

	  primarily for embedded systems.  These processors are both

arch/xtensa/Kconfig.debug

+10 −0
Original line number Original line Diff line number Diff line
@@ -2,6 +2,16 @@ menu "Kernel hacking" 




source "lib/Kconfig.debug"

source "lib/Kconfig.debug"





config DEBUG_TLB_SANITY

	bool "Debug TLB sanity"

	depends on DEBUG_KERNEL

	help

	  Enable this to turn on TLB sanity check on each entry to userspace.

	  This check can spot missing TLB invalidation/wrong PTE permissions/

	  premature page freeing.



	  If unsure, say N.



config LD_NO_RELAX

config LD_NO_RELAX

	bool "Disable linker relaxation"

	bool "Disable linker relaxation"

	default n

	default n

arch/xtensa/boot/.gitignore

0 → 100644
+3 −0
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uImage

zImage.redboot

*.dtb

arch/xtensa/boot/boot-elf/.gitignore

0 → 100644
+1 −0
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boot.lds

arch/xtensa/boot/lib/.gitignore

0 → 100644
+3 −0
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inffast.c

inflate.c

inftrees.c