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Commit d49b1f43 authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala Committed by Gerrit - the friendly Code Review server
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msm/sde/rotator: Snapshot of SDE Rotator supporting files 



This snapshot includes SDE Rotator files. This change also has
the copyright year update in the files. Snapshot was taken from
msm-4.14 as of commit 1df57774a520
("ARM: dts: msm: Remove dma-coherent for IPA for sdxprairie").

Change-Id: I86f79e07ee27e7b254917d799940790953d3d2d2
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent 1e024620

drivers/media/platform/msm/sde/rotator/sde_rotator_base.c

+0 −2
Original line number Diff line number Diff line
@@ -716,8 +716,6 @@ static int sde_mdp_parse_dt_misc(struct platform_device *pdev, 
		 "qcom,mdss-rot-qos-cpu-dma-latency", &data);

	mdata->rot_pm_qos_cpu_dma_latency = (!rc ? data : 0);



	sde_rotator_pm_qos_add(mdata);



	mdata->mdp_base = mdata->sde_io.base + SDE_MDP_OFFSET;



	return 0;

drivers/media/platform/msm/sde/rotator/sde_rotator_base.h

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 
#define SDE_MDP_HW_REV_400	SDE_MDP_REV(4, 0, 0)	/* sdm845 v1.0 */

#define SDE_MDP_HW_REV_410	SDE_MDP_REV(4, 1, 0)	/* sdm670 v1.0 */

#define SDE_MDP_HW_REV_500	SDE_MDP_REV(5, 0, 0)	/* sm8150 v1.0 */

#define SDE_MDP_HW_REV_520	SDE_MDP_REV(5, 2, 0)	/* sdmmagpie v1.0 */

#define SDE_MDP_HW_REV_530	SDE_MDP_REV(5, 3, 0)	/* sm6150 v1.0 */

#define SDE_MDP_HW_REV_600	SDE_MDP_REV(6, 0, 0)    /* msmnile+ v1.0 */

drivers/media/platform/msm/sde/rotator/sde_rotator_core.c

+17 −0
Original line number Diff line number Diff line
@@ -1393,6 +1393,12 @@ static int sde_rotator_calc_perf(struct sde_rot_mgr *mgr, 
	if (mgr->min_rot_clk > perf->clk_rate)

		perf->clk_rate = mgr->min_rot_clk;



	if (mgr->max_rot_clk && (perf->clk_rate > mgr->max_rot_clk)) {

		SDEROT_ERR("invalid clock:%ld exceeds max:%ld allowed\n",

				perf->clk_rate, mgr->max_rot_clk);

		return -EINVAL;

	}



	read_bw =  sde_rotator_calc_buf_bw(in_fmt, config->input.width,

				config->input.height, max_fps);
@@ -3175,6 +3181,15 @@ int sde_rotator_core_init(struct sde_rot_mgr **pmgr, 
		mgr->ops_hw_init = sde_rotator_r3_init;

		mgr->min_rot_clk = ROT_MIN_ROT_CLK;



		/*

		 * on platforms where the maxlinewidth is greater than

		 * default we need to have a max clock rate check to

		 * ensure we do not cross the max allowed clock for rotator

		 */

		if (IS_SDE_MAJOR_SAME(mdata->mdss_version,

			SDE_MDP_HW_REV_500))

			mgr->max_rot_clk = ROT_R3_MAX_ROT_CLK;



		if (!IS_SDE_MAJOR_SAME(mdata->mdss_version,

					SDE_MDP_HW_REV_600) &&

				!sde_rotator_get_clk(mgr,
@@ -3196,6 +3211,8 @@ int sde_rotator_core_init(struct sde_rot_mgr **pmgr, 
		goto error_hw_init;

	}



	sde_rotator_pm_qos_add(mdata);



	ret = sde_rotator_init_queue(mgr);

	if (ret) {

		SDEROT_ERR("fail to init queue\n");

drivers/media/platform/msm/sde/rotator/sde_rotator_core.h

+2 −0
Original line number Diff line number Diff line
@@ -416,6 +416,7 @@ struct sde_rot_bus_data_type { 
 * @fudge_factor: fudge factor for clock calculation

 * @overhead: software overhead for offline rotation in msec

 * @min_rot_clk: minimum rotator clock rate

 * @max_rot_clk: maximum allowed rotator clock rate

 * @sbuf_ctx: pointer to sbuf session context

 * @ops_xxx: function pointers of rotator HAL layer

 * @hw_data: private handle of rotator HAL layer
@@ -462,6 +463,7 @@ struct sde_rot_mgr { 
	struct sde_mult_factor fudge_factor;

	struct sde_mult_factor overhead;

	unsigned long min_rot_clk;

	unsigned long max_rot_clk;



	struct sde_rot_file_private *sbuf_ctx;

drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c

+42 −18
Original line number Diff line number Diff line
@@ -1492,7 +1492,7 @@ static void sde_hw_rotator_setup_fetchengine(struct sde_hw_rotator_context *ctx, 
			((rot->highest_bank & 0x3) << 18));



	if (test_bit(SDE_CAPS_UBWC_2, mdata->sde_caps_map))

		SDE_REGDMA_WRITE(wrptr, ROT_SSPP_UBWC_STATIC_CTRL, BIT(31) |

		SDE_REGDMA_WRITE(wrptr, ROT_SSPP_UBWC_STATIC_CTRL,

				((ctx->rot->ubwc_malsize & 0x3) << 8) |

				((ctx->rot->highest_bank & 0x3) << 4) |

				((ctx->rot->ubwc_swizzle & 0x1) << 0));
@@ -2048,6 +2048,8 @@ static u32 sde_hw_rotator_wait_done_regdma( 
{

	struct sde_hw_rotator *rot = ctx->rot;

	int rc = 0;

	bool timeout = false;

	bool pending;

	bool abort;

	u32 status;

	u32 last_isr;
@@ -2055,7 +2057,8 @@ static u32 sde_hw_rotator_wait_done_regdma( 
	u32 int_id;

	u32 swts;

	u32 sts = 0;

	u32 ubwcerr = 0;

	u32 ubwcerr;

	u32 hwts[ROT_QUEUE_MAX];

	unsigned long flags;



	if (rot->irq_num >= 0) {
@@ -2079,23 +2082,18 @@ static u32 sde_hw_rotator_wait_done_regdma( 
				status, int_id, last_ts);



		if (rc == 0 || (status & REGDMA_INT_ERR_MASK) || abort) {

			bool pending;



			timeout = true;

			pending = rot->ops.get_pending_ts(rot, ctx, &swts);

			SDEROT_ERR(

				"Timeout wait for regdma interrupt status, ts:0x%X/0x%X, pending:%d, abort:%d\n",

				ctx->timestamp, swts, pending, abort);



			if (status & REGDMA_WATCHDOG_INT)

				SDEROT_ERR("REGDMA watchdog interrupt\n");

			else if (status & REGDMA_INVALID_DESCRIPTOR)

				SDEROT_ERR("REGDMA invalid descriptor\n");

			else if (status & REGDMA_INCOMPLETE_CMD)

				SDEROT_ERR("REGDMA incomplete command\n");

			else if (status & REGDMA_INVALID_CMD)

				SDEROT_ERR("REGDMA invalid command\n");



			_sde_hw_rotator_dump_status(rot, &ubwcerr);

			/* cache ubwcerr and hw timestamps while locked */

			ubwcerr = SDE_ROTREG_READ(rot->mdss_base,

					ROT_SSPP_UBWC_ERROR_STATUS);

			hwts[ROT_QUEUE_HIGH_PRIORITY] =

					__sde_hw_rotator_get_timestamp(rot,

					ROT_QUEUE_HIGH_PRIORITY);

			hwts[ROT_QUEUE_LOW_PRIORITY] =

					__sde_hw_rotator_get_timestamp(rot,

					ROT_QUEUE_LOW_PRIORITY);



			if (ubwcerr || abort) {

				/*
@@ -2124,6 +2122,28 @@ static u32 sde_hw_rotator_wait_done_regdma( 
		}



		spin_unlock_irqrestore(&rot->rotisr_lock, flags);



		/* dump rot status after releasing lock if timeout occurred */

		if (timeout) {

			SDEROT_ERR(

				"TIMEOUT, ts:0x%X/0x%X, pending:%d, abort:%d\n",

				ctx->timestamp, swts, pending, abort);

			SDEROT_ERR(

				"Cached: HW ts0/ts1 = %x/%x, ubwcerr = %x\n",

				hwts[ROT_QUEUE_HIGH_PRIORITY],

				hwts[ROT_QUEUE_LOW_PRIORITY], ubwcerr);



			if (status & REGDMA_WATCHDOG_INT)

				SDEROT_ERR("REGDMA watchdog interrupt\n");

			else if (status & REGDMA_INVALID_DESCRIPTOR)

				SDEROT_ERR("REGDMA invalid descriptor\n");

			else if (status & REGDMA_INCOMPLETE_CMD)

				SDEROT_ERR("REGDMA incomplete command\n");

			else if (status & REGDMA_INVALID_CMD)

				SDEROT_ERR("REGDMA invalid command\n");



			_sde_hw_rotator_dump_status(rot, &ubwcerr);

		}

	} else {

		int cnt = 200;

		bool pending;
@@ -3132,7 +3152,9 @@ static int sde_rotator_hw_rev_init(struct sde_hw_rotator *rot) 
		rot->downscale_caps =

			"LINEAR/1.5/2/4/8/16/32/64 TILE/1.5/2/4 TP10/1.5/2";

	} else if (IS_SDE_MAJOR_MINOR_SAME(mdata->mdss_version,

				SDE_MDP_HW_REV_530)) {

				SDE_MDP_HW_REV_530) ||

				IS_SDE_MAJOR_MINOR_SAME(mdata->mdss_version,

					SDE_MDP_HW_REV_520)) {

		SDEROT_DBG("Supporting sys cache inline rotation\n");

		set_bit(SDE_CAPS_SBUF_1,  mdata->sde_caps_map);

		set_bit(SDE_CAPS_UBWC_2,  mdata->sde_caps_map);
@@ -3535,6 +3557,8 @@ static ssize_t sde_hw_rotator_show_caps(struct sde_rot_mgr *mgr, 
	if (hw_data->downscale_caps)

		SPRINT("downscale_ratios=%s\n", hw_data->downscale_caps);



	SPRINT("max_line_width=%d\n", sde_rotator_get_maxlinewidth(mgr));



#undef SPRINT

	return cnt;

}