Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.c +10 −5 Original line number Diff line number Diff line Loading @@ -65,7 +65,8 @@ #define MAX_DOWNSCALE_RATIO 4 #define SSPP_UNITY_SCALE 1 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DEFAULT 2 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR 11 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR 5 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT 4 #define MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT 1088 Loading Loading @@ -1143,8 +1144,10 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg, if (IS_SDE_INLINE_ROT_REV_100(sde_cfg->true_inline_rot_rev)) { set_bit(SDE_SSPP_TRUE_INLINE_ROT_V1, &sspp->features); sblk->in_rot_format_list = sde_cfg->inline_rot_formats; sblk->in_rot_maxdwnscale_rt = sde_cfg->true_inline_dwnscale_rt; sblk->in_rot_maxdwnscale_rt_num = sde_cfg->true_inline_dwnscale_rt_num; sblk->in_rot_maxdwnscale_rt_denom = sde_cfg->true_inline_dwnscale_rt_denom; sblk->in_rot_maxdwnscale_nrt = sde_cfg->true_inline_dwnscale_nrt; sblk->in_rot_maxheight = Loading Loading @@ -3852,8 +3855,10 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features); sde_cfg->has_vig_p010 = true; sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0; sde_cfg->true_inline_dwnscale_rt = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DEFAULT; sde_cfg->true_inline_dwnscale_rt_num = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR; sde_cfg->true_inline_dwnscale_rt_denom = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR; sde_cfg->true_inline_dwnscale_nrt = MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT; sde_cfg->true_inline_prefill_fudge_lines = 2; Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.h +12 −4 Original line number Diff line number Diff line Loading @@ -593,7 +593,10 @@ struct sde_qos_lut_tbl { * @format_list: Pointer to list of supported formats * @virt_format_list: Pointer to list of supported formats for virtual planes * @in_rot_format_list: Pointer to list of supported formats for inline rotation * @in_rot_maxdwnscale_rt: max downscale ratio for inline rotation rt clients * @in_rot_maxdwnscale_rt_num: max downscale ratio for inline rotation * rt clients - numerator * @in_rot_maxdwnscale_rt_denom: max downscale ratio for inline rotation * rt clients - denominator * @in_rot_maxdwnscale_nrt: max downscale ratio for inline rotation nrt clients * @in_rot_maxheight: max pre rotated height for inline rotation * @in_rot_prefill_fudge_lines: prefill fudge lines for inline rotation Loading Loading @@ -630,7 +633,8 @@ struct sde_sspp_sub_blks { const struct sde_format_extended *format_list; const struct sde_format_extended *virt_format_list; const struct sde_format_extended *in_rot_format_list; u32 in_rot_maxdwnscale_rt; u32 in_rot_maxdwnscale_rt_num; u32 in_rot_maxdwnscale_rt_denom; u32 in_rot_maxdwnscale_nrt; u32 in_rot_maxheight; u32 in_rot_prefill_fudge_lines; Loading Loading @@ -1186,7 +1190,10 @@ struct sde_perf_cfg { * @vbif_qos_nlvl number of vbif QoS priority level * @ts_prefill_rev prefill traffic shaper feature revision * @true_inline_rot_rev inline rotator feature revision * @true_inline_dwnscale_rt true inline rotator downscale ratio for rt * @true_inline_dwnscale_rt_num true inline rotator downscale ratio for rt * - numerator * @true_inline_dwnscale_rt_denom true inline rot downscale ratio for rt * - denominator * @true_inline_dwnscale_nrt true inline rotator downscale ratio for nrt * @true_inline_prefill_fudge_lines true inline rotator prefill fudge lines * @true_inline_prefill_lines_nv12 true inline prefill lines for nv12 format Loading Loading @@ -1244,7 +1251,8 @@ struct sde_mdss_cfg { u32 vbif_qos_nlvl; u32 ts_prefill_rev; u32 true_inline_rot_rev; u32 true_inline_dwnscale_rt; u32 true_inline_dwnscale_rt_num; u32 true_inline_dwnscale_rt_denom; u32 true_inline_dwnscale_nrt; u32 true_inline_prefill_fudge_lines; u32 true_inline_prefill_lines_nv12; Loading drivers/gpu/drm/msm/sde/sde_plane.c +38 −15 Original line number Diff line number Diff line Loading @@ -1645,14 +1645,16 @@ static int sde_plane_rot_atomic_check(struct drm_plane *plane, */ rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y); if (!psde->pipe_sblk->in_rot_maxdwnscale_rt || if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num || !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom || !psde->pipe_sblk->in_rot_maxdwnscale_nrt || !psde->pipe_sblk->in_rot_maxheight || !psde->pipe_sblk->in_rot_format_list || !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))) { SDE_ERROR_PLANE(psde, "wrong config rt:%d nrt:%d fmt:%d h:%d 0x%x\n", !psde->pipe_sblk->in_rot_maxdwnscale_rt, "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n", !psde->pipe_sblk->in_rot_maxdwnscale_rt_num, !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom, !psde->pipe_sblk->in_rot_maxdwnscale_nrt, !psde->pipe_sblk->in_rot_format_list, !psde->pipe_sblk->in_rot_maxheight, Loading Loading @@ -2419,7 +2421,8 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, int ret = 0; uint32_t deci_w, deci_h, src_deci_w, src_deci_h; uint32_t scaler_src_w, scaler_src_h; uint32_t max_upscale, max_downscale, max_linewidth; uint32_t max_downscale_num, max_downscale_denom; uint32_t max_upscale, max_linewidth; bool inline_rotation, rt_client; struct drm_crtc *crtc; Loading Loading @@ -2448,14 +2451,20 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, else rt_client = true; max_downscale_denom = 1; /* inline rotation RT clients have a different max downscaling limit */ if (inline_rotation) { if (rt_client) max_downscale = psde->pipe_sblk->in_rot_maxdwnscale_rt; else max_downscale = psde->pipe_sblk->in_rot_maxdwnscale_nrt; if (rt_client) { max_downscale_num = psde->pipe_sblk->in_rot_maxdwnscale_rt_num; max_downscale_denom = psde->pipe_sblk->in_rot_maxdwnscale_rt_denom; } else { max_downscale_num = psde->pipe_sblk->in_rot_maxdwnscale_nrt; } } else { max_downscale = psde->pipe_sblk->maxdwnscale; max_downscale_num = psde->pipe_sblk->maxdwnscale; } /* decimation validation */ Loading Loading @@ -2488,8 +2497,10 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, /* check max scaler capability */ else if (((scaler_src_w * max_upscale) < dst->w) || ((scaler_src_h * max_upscale) < dst->h) || ((dst->w * max_downscale) < scaler_src_w) || ((dst->h * max_downscale) < scaler_src_h)) { (((dst->w * max_downscale_num) / max_downscale_denom) < scaler_src_w) || (((dst->h * max_downscale_num) / max_downscale_denom) < scaler_src_h)) { SDE_ERROR_PLANE(psde, "too much scaling requested %ux%u->%ux%u rot:%d\n", scaler_src_w, scaler_src_h, dst->w, dst->h, Loading Loading @@ -3554,8 +3565,16 @@ static void _sde_plane_install_properties(struct drm_plane *plane, const struct sde_format_extended *inline_rot_fmt_list; sde_kms_info_add_keyint(info, "true_inline_rot_rev", 1); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt", psde->pipe_sblk->in_rot_maxdwnscale_rt); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt", (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num / psde->pipe_sblk->in_rot_maxdwnscale_rt_denom)); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt_numerator", psde->pipe_sblk->in_rot_maxdwnscale_rt_num); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt_denominator", psde->pipe_sblk->in_rot_maxdwnscale_rt_denom); sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt", psde->pipe_sblk->in_rot_maxdwnscale_nrt); sde_kms_info_add_keyint(info, "true_inline_max_height", Loading Loading @@ -4285,10 +4304,14 @@ static int _sde_plane_init_debugfs(struct drm_plane *plane) &psde->debugfs_default_scale); if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) { debugfs_create_u32("in_rot_max_downscale_rt", debugfs_create_u32("in_rot_max_downscale_rt_num", 0600, psde->debugfs_root, (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num); debugfs_create_u32("in_rot_max_downscale_rt_denom", 0600, psde->debugfs_root, (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt); (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom); debugfs_create_u32("in_rot_max_downscale_nrt", 0600, psde->debugfs_root, Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.c +10 −5 Original line number Diff line number Diff line Loading @@ -65,7 +65,8 @@ #define MAX_DOWNSCALE_RATIO 4 #define SSPP_UNITY_SCALE 1 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DEFAULT 2 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR 11 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR 5 #define MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT 4 #define MAX_PRE_ROT_HEIGHT_INLINE_ROT_DEFAULT 1088 Loading Loading @@ -1143,8 +1144,10 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg, if (IS_SDE_INLINE_ROT_REV_100(sde_cfg->true_inline_rot_rev)) { set_bit(SDE_SSPP_TRUE_INLINE_ROT_V1, &sspp->features); sblk->in_rot_format_list = sde_cfg->inline_rot_formats; sblk->in_rot_maxdwnscale_rt = sde_cfg->true_inline_dwnscale_rt; sblk->in_rot_maxdwnscale_rt_num = sde_cfg->true_inline_dwnscale_rt_num; sblk->in_rot_maxdwnscale_rt_denom = sde_cfg->true_inline_dwnscale_rt_denom; sblk->in_rot_maxdwnscale_nrt = sde_cfg->true_inline_dwnscale_nrt; sblk->in_rot_maxheight = Loading Loading @@ -3852,8 +3855,10 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features); sde_cfg->has_vig_p010 = true; sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0; sde_cfg->true_inline_dwnscale_rt = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DEFAULT; sde_cfg->true_inline_dwnscale_rt_num = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR; sde_cfg->true_inline_dwnscale_rt_denom = MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR; sde_cfg->true_inline_dwnscale_nrt = MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT; sde_cfg->true_inline_prefill_fudge_lines = 2; Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.h +12 −4 Original line number Diff line number Diff line Loading @@ -593,7 +593,10 @@ struct sde_qos_lut_tbl { * @format_list: Pointer to list of supported formats * @virt_format_list: Pointer to list of supported formats for virtual planes * @in_rot_format_list: Pointer to list of supported formats for inline rotation * @in_rot_maxdwnscale_rt: max downscale ratio for inline rotation rt clients * @in_rot_maxdwnscale_rt_num: max downscale ratio for inline rotation * rt clients - numerator * @in_rot_maxdwnscale_rt_denom: max downscale ratio for inline rotation * rt clients - denominator * @in_rot_maxdwnscale_nrt: max downscale ratio for inline rotation nrt clients * @in_rot_maxheight: max pre rotated height for inline rotation * @in_rot_prefill_fudge_lines: prefill fudge lines for inline rotation Loading Loading @@ -630,7 +633,8 @@ struct sde_sspp_sub_blks { const struct sde_format_extended *format_list; const struct sde_format_extended *virt_format_list; const struct sde_format_extended *in_rot_format_list; u32 in_rot_maxdwnscale_rt; u32 in_rot_maxdwnscale_rt_num; u32 in_rot_maxdwnscale_rt_denom; u32 in_rot_maxdwnscale_nrt; u32 in_rot_maxheight; u32 in_rot_prefill_fudge_lines; Loading Loading @@ -1186,7 +1190,10 @@ struct sde_perf_cfg { * @vbif_qos_nlvl number of vbif QoS priority level * @ts_prefill_rev prefill traffic shaper feature revision * @true_inline_rot_rev inline rotator feature revision * @true_inline_dwnscale_rt true inline rotator downscale ratio for rt * @true_inline_dwnscale_rt_num true inline rotator downscale ratio for rt * - numerator * @true_inline_dwnscale_rt_denom true inline rot downscale ratio for rt * - denominator * @true_inline_dwnscale_nrt true inline rotator downscale ratio for nrt * @true_inline_prefill_fudge_lines true inline rotator prefill fudge lines * @true_inline_prefill_lines_nv12 true inline prefill lines for nv12 format Loading Loading @@ -1244,7 +1251,8 @@ struct sde_mdss_cfg { u32 vbif_qos_nlvl; u32 ts_prefill_rev; u32 true_inline_rot_rev; u32 true_inline_dwnscale_rt; u32 true_inline_dwnscale_rt_num; u32 true_inline_dwnscale_rt_denom; u32 true_inline_dwnscale_nrt; u32 true_inline_prefill_fudge_lines; u32 true_inline_prefill_lines_nv12; Loading
drivers/gpu/drm/msm/sde/sde_plane.c +38 −15 Original line number Diff line number Diff line Loading @@ -1645,14 +1645,16 @@ static int sde_plane_rot_atomic_check(struct drm_plane *plane, */ rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y); if (!psde->pipe_sblk->in_rot_maxdwnscale_rt || if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num || !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom || !psde->pipe_sblk->in_rot_maxdwnscale_nrt || !psde->pipe_sblk->in_rot_maxheight || !psde->pipe_sblk->in_rot_format_list || !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))) { SDE_ERROR_PLANE(psde, "wrong config rt:%d nrt:%d fmt:%d h:%d 0x%x\n", !psde->pipe_sblk->in_rot_maxdwnscale_rt, "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n", !psde->pipe_sblk->in_rot_maxdwnscale_rt_num, !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom, !psde->pipe_sblk->in_rot_maxdwnscale_nrt, !psde->pipe_sblk->in_rot_format_list, !psde->pipe_sblk->in_rot_maxheight, Loading Loading @@ -2419,7 +2421,8 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, int ret = 0; uint32_t deci_w, deci_h, src_deci_w, src_deci_h; uint32_t scaler_src_w, scaler_src_h; uint32_t max_upscale, max_downscale, max_linewidth; uint32_t max_downscale_num, max_downscale_denom; uint32_t max_upscale, max_linewidth; bool inline_rotation, rt_client; struct drm_crtc *crtc; Loading Loading @@ -2448,14 +2451,20 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, else rt_client = true; max_downscale_denom = 1; /* inline rotation RT clients have a different max downscaling limit */ if (inline_rotation) { if (rt_client) max_downscale = psde->pipe_sblk->in_rot_maxdwnscale_rt; else max_downscale = psde->pipe_sblk->in_rot_maxdwnscale_nrt; if (rt_client) { max_downscale_num = psde->pipe_sblk->in_rot_maxdwnscale_rt_num; max_downscale_denom = psde->pipe_sblk->in_rot_maxdwnscale_rt_denom; } else { max_downscale_num = psde->pipe_sblk->in_rot_maxdwnscale_nrt; } } else { max_downscale = psde->pipe_sblk->maxdwnscale; max_downscale_num = psde->pipe_sblk->maxdwnscale; } /* decimation validation */ Loading Loading @@ -2488,8 +2497,10 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, /* check max scaler capability */ else if (((scaler_src_w * max_upscale) < dst->w) || ((scaler_src_h * max_upscale) < dst->h) || ((dst->w * max_downscale) < scaler_src_w) || ((dst->h * max_downscale) < scaler_src_h)) { (((dst->w * max_downscale_num) / max_downscale_denom) < scaler_src_w) || (((dst->h * max_downscale_num) / max_downscale_denom) < scaler_src_h)) { SDE_ERROR_PLANE(psde, "too much scaling requested %ux%u->%ux%u rot:%d\n", scaler_src_w, scaler_src_h, dst->w, dst->h, Loading Loading @@ -3554,8 +3565,16 @@ static void _sde_plane_install_properties(struct drm_plane *plane, const struct sde_format_extended *inline_rot_fmt_list; sde_kms_info_add_keyint(info, "true_inline_rot_rev", 1); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt", psde->pipe_sblk->in_rot_maxdwnscale_rt); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt", (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num / psde->pipe_sblk->in_rot_maxdwnscale_rt_denom)); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt_numerator", psde->pipe_sblk->in_rot_maxdwnscale_rt_num); sde_kms_info_add_keyint(info, "true_inline_dwnscale_rt_denominator", psde->pipe_sblk->in_rot_maxdwnscale_rt_denom); sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt", psde->pipe_sblk->in_rot_maxdwnscale_nrt); sde_kms_info_add_keyint(info, "true_inline_max_height", Loading Loading @@ -4285,10 +4304,14 @@ static int _sde_plane_init_debugfs(struct drm_plane *plane) &psde->debugfs_default_scale); if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) { debugfs_create_u32("in_rot_max_downscale_rt", debugfs_create_u32("in_rot_max_downscale_rt_num", 0600, psde->debugfs_root, (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num); debugfs_create_u32("in_rot_max_downscale_rt_denom", 0600, psde->debugfs_root, (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt); (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom); debugfs_create_u32("in_rot_max_downscale_nrt", 0600, psde->debugfs_root, Loading