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Commit d3af6976 authored by Leela Krishna Amudala's avatar Leela Krishna Amudala Committed by Kukjin Kim
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ARM: EXYNOS: Add generic cpu power control functions for exynos SoCs



Add generic cpu power control functions for exynos based
SoCS for cpu power up/down and to know the cpu status.

Signed-off-by: default avatarLeela Krishna Amudala <leela.krishna@linaro.org>
Signed-off-by: default avatarAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent d7067f1c
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+3 −0
Original line number Diff line number Diff line
@@ -63,5 +63,8 @@ struct exynos_pmu_conf {
};

extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
extern void exynos_cpu_power_down(int cpu);
extern void exynos_cpu_power_up(int cpu);
extern int  exynos_cpu_power_state(int cpu);

#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
+36 −0
Original line number Diff line number Diff line
@@ -100,6 +100,42 @@ static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
	return -ENOENT;
}

/**
 * exynos_core_power_down : power down the specified cpu
 * @cpu : the cpu to power down
 *
 * Power down the specified cpu. The sequence must be finished by a
 * call to cpu_do_idle()
 *
 */
void exynos_cpu_power_down(int cpu)
{
	__raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}

/**
 * exynos_cpu_power_up : power up the specified cpu
 * @cpu : the cpu to power up
 *
 * Power up the specified cpu
 */
void exynos_cpu_power_up(int cpu)
{
	__raw_writel(S5P_CORE_LOCAL_PWR_EN,
		     EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}

/**
 * exynos_cpu_power_state : returns the power state of the cpu
 * @cpu : the cpu to retrieve the power state from
 *
 */
int exynos_cpu_power_state(int cpu)
{
	return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &
			S5P_CORE_LOCAL_PWR_EN);
}

/* For Cortex-A9 Diagnostic and Power control register */
static unsigned int save_arm_register[2];

+6 −0
Original line number Diff line number Diff line
@@ -105,6 +105,12 @@
#define S5P_GPS_LOWPWR				S5P_PMUREG(0x139C)
#define S5P_GPS_ALIVE_LOWPWR			S5P_PMUREG(0x13A0)

#define EXYNOS_ARM_CORE0_CONFIGURATION		S5P_PMUREG(0x2000)
#define EXYNOS_ARM_CORE_CONFIGURATION(_nr)	\
			(EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
#define EXYNOS_ARM_CORE_STATUS(_nr)		\
			(EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)

#define S5P_ARM_CORE1_CONFIGURATION		S5P_PMUREG(0x2080)
#define S5P_ARM_CORE1_STATUS			S5P_PMUREG(0x2084)