Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d1e1b351 authored by Balbir Singh's avatar Balbir Singh Committed by Michael Ellerman
Browse files

powerpc/xmon: Add ISA v3.0 SPRs to SPR dump 



Add support for printing the PIDR/TIDR for ISA 300 and PSSCR and PTCR
in ISA 3.0 hypervisor mode.

SPRN_PSSCR_PR is the privileged mode access and is used when we are
not in hypervisor mode.

Signed-off-by: default avatarBalbir Singh <bsingharora@gmail.com>
[mpe: Split out of larger patch]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 64d66aa0

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -356,6 +356,7 @@ 
#define SPRN_PMSR	0x355   /* Power Management Status Reg */

#define SPRN_PMMAR	0x356	/* Power Management Memory Activity Register */

#define SPRN_PSSCR	0x357	/* Processor Stop Status and Control Register (ISA 3.0) */

#define SPRN_PSSCR_PR	0x337	/* PSSCR ISA 3.0, privileged mode access */

#define SPRN_PMCR	0x374	/* Power Management Control Register */



/* HFSCR and FSCR bit numbers are the same */

arch/powerpc/xmon/xmon.c

+23 −0
Original line number Diff line number Diff line
@@ -1807,6 +1807,28 @@ static void dump_207_sprs(void) 
#endif

}



static void dump_300_sprs(void)

{

#ifdef CONFIG_PPC64

	bool hv = mfmsr() & MSR_HV;



	if (!cpu_has_feature(CPU_FTR_ARCH_300))

		return;



	printf("pidr   = %.16lx  tidr  = %.16lx\n",

		mfspr(SPRN_PID), mfspr(SPRN_TIDR));

	printf("asdr   = %.16lx  psscr = %.16lx\n",

		mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)

					: mfspr(SPRN_PSSCR_PR));



	if (!hv)

		return;



	printf("ptcr   = %.16lx\n",

		mfspr(SPRN_PTCR));

#endif

}



static void dump_one_spr(int spr, bool show_unimplemented)

{

	unsigned long val;
@@ -1860,6 +1882,7 @@ static void super_regs(void) 


		dump_206_sprs();

		dump_207_sprs();

		dump_300_sprs();



		return;

	}