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Commit d1be371d authored by Zhao, Xinda's avatar Zhao, Xinda Committed by Zhenyu Wang
Browse files

drm/i915/gvt: handle fence reg access during GPU reset 



Lots of reduntant log info will be printed out during GPU reset,
including accessing untracked mmio register and fence register,
variable disable_warn_untrack is added previously to handle the
situation, but the accessing of fence register is ignored in the
previously patch, so add it back.

Besides, set the variable disable_warn_untrack to the defalut value
after GPU reset is finished.

Signed-off-by: default avatarZhao, Xinda <xinda.zhao@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent fd64be63

drivers/gpu/drm/i915/gvt/handlers.c

+9 −6
Original line number Diff line number Diff line
@@ -173,16 +173,19 @@ static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu, 
		 * pv_info first, we treat guest not supporting GVT,

		 * and we will let vgpu enter failsafe mode.

		 */

		if (!vgpu->pv_notified) {

		if (!vgpu->pv_notified)

			enter_failsafe_mode(vgpu,

					GVT_FAILSAFE_UNSUPPORTED_GUEST);

			return -EINVAL;

		}



		if (!vgpu->mmio.disable_warn_untrack) {

			gvt_err("vgpu%d: found oob fence register access\n",

					vgpu->id);

		gvt_err("vgpu%d: total fence num %d access fence num %d\n",

				vgpu->id, vgpu_fence_sz(vgpu), fence_num);

			gvt_err("vgpu%d: total fence %d, access fence %d\n",

					vgpu->id, vgpu_fence_sz(vgpu),

					fence_num);

		}

		memset(p_data, 0, bytes);

		return -EINVAL;

	}

	return 0;

}

drivers/gpu/drm/i915/gvt/mmio.c

+2 −0
Original line number Diff line number Diff line
@@ -384,6 +384,8 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu) 


	/* set the bit 0:2(Core C-State ) to C0 */

	vgpu_vreg(vgpu, GEN6_GT_CORE_STATUS) = 0;



	vgpu->mmio.disable_warn_untrack = false;

}



/**