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Commit d17adfdb authored by Stephen Warren's avatar Stephen Warren Committed by Olof Johansson
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ARM: dt: Add binding for Tegra PMC



The Tegra PMC (Power Management Controller) interfaces with an external
PMU (Power Management Unit), and controls wake-up from sleep modes.

This initial binding is the bare minimum required to control the PMC's
inversion of the PMU's interrupt signal.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 797acf70
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NVIDIA Tegra Power Management Controller (PMC)

Properties:
- name : Should be pmc
- compatible : Should contain "nvidia,tegra<chip>-pmc".
- reg : Offset and length of the register set for the device
- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
  The PMU is an external Power Management Unit, whose interrupt output
  signal is fed into the PMC. This signal is optionally inverted, and then
  fed into the ARM GIC. The PMC is not involved in the detection or
  handling of this interrupt signal, merely its inversion.

Example:

pmc@7000f400 {
	compatible = "nvidia,tegra20-pmc";
	reg = <0x7000e400 0x400>;
	nvidia,invert-interrupt;
};
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@@ -10,6 +10,10 @@
		reg = < 0x00000000 0x40000000 >;
	};

	pmc@7000f400 {
		nvidia,invert-interrupt;
	};

	i2c@7000c000 {
		clock-frequency = <400000>;

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@@ -4,6 +4,11 @@
	compatible = "nvidia,tegra20";
	interrupt-parent = <&intc>;

	pmc@7000f400 {
		compatible = "nvidia,tegra20-pmc";
		reg = <0x7000e400 0x400>;
	};

	intc: interrupt-controller@50041000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;
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@@ -4,6 +4,11 @@
	compatible = "nvidia,tegra30";
	interrupt-parent = <&intc>;

	pmc@7000f400 {
		compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
		reg = <0x7000e400 0x400>;
	};

	intc: interrupt-controller@50041000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;