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Unverified Commit d1157b10 authored May 15, 2018 by Maciej W. Rozycki Committed by James Hogan May 24, 2018

MIPS: ptrace: Make FPU context layout comments match reality



Correct comments across ptrace(2) handlers about an FPU register context
layout discrepancy between MIPS I and later ISAs, which was fixed with
`linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
ptrace() handling fixes."), and then broken and fixed over and over
again, until last time fixed with commit 80cbfad7 ("MIPS: Correct
MIPS I FP context layout").

NB running the GDB test suite for the relevant ABI/ISA and watching out
for regressions is advisable when poking around ptrace(2).

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19326/


Signed-off-by: James Hogan <jhogan@kernel.org>

parent 21325631

arch/mips/kernel/ptrace.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -797,7 +797,7 @@ long arch_ptrace(struct task_struct *child, long request,
	/*		/*
	* The odd registers are actually the high		* The odd registers are actually the high
	* order bits of the values stored in the even		* order bits of the values stored in the even
	* registers - unless we're using r2k_switch.S.		* registers.
	*/		*/
	tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],		tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
	addr & 1);		addr & 1);
	@@ -892,7 +892,7 @@ long arch_ptrace(struct task_struct *child, long request,
	/*		/*
	* The odd registers are actually the high		* The odd registers are actually the high
	* order bits of the values stored in the even		* order bits of the values stored in the even
	* registers - unless we're using r2k_switch.S.		* registers.
	*/		*/
	set_fpr32(&fregs[(addr & ~1) - FPR_BASE],		set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
	addr & 1, data);		addr & 1, data);

arch/mips/kernel/ptrace32.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
	/*		/*
	* The odd registers are actually the high		* The odd registers are actually the high
	* order bits of the values stored in the even		* order bits of the values stored in the even
	* registers - unless we're using r2k_switch.S.		* registers.
	*/		*/
	tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],		tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
	addr & 1);		addr & 1);
	@@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
	/*		/*
	* The odd registers are actually the high		* The odd registers are actually the high
	* order bits of the values stored in the even		* order bits of the values stored in the even
	* registers - unless we're using r2k_switch.S.		* registers.
	*/		*/
	set_fpr32(&fregs[(addr & ~1) - FPR_BASE],		set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
	addr & 1, data);		addr & 1, data);