dt-bindings: clock: Add mdss-28nm-pll-clk for legacy targets

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2016-2019, 2021 The Linux Foundation. All rights reserved.

 */

#ifndef __MDSS_28NM_PLL_CLK_LEGACY_H

#define __MDSS_28NM_PLL_CLK_LEGACY_H

/* DSI PLL clocks */

#define VCOCLK_0		0

#define ANALOG_POSTDIV_0_CLK	1

#define INDIRECT_PATH_SRC_0_CLK	2

#define BYTECLK_SRC_MUX_0_CLK	3

#define BYTECLK_SRC_0_CLK	4

#define PCLK_SRC_0_CLK		5

#define VCOCLK_1		6

#define ANALOG_POSTDIV_1_CLK	7

#define INDIRECT_PATH_SRC_1_CLK	8

#define BYTECLK_SRC_MUX_1_CLK	9

#define BYTECLK_SRC_1_CLK	10

#define PCLK_SRC_1_CLK		11

/* HDMI PLL clocks */

#define HDMI_VCO_CLK			0

#define HDMI_VCO_DIVIDED_1_CLK_SRC	1

#define HDMI_VCO_DIVIDED_TWO_CLK_SRC	2

#define HDMI_VCO_DIVIDED_FOUR_CLK_SRC	3

#define HDMI_VCO_DIVIDED_SIX_CLK_SRC	4

#define HDMI_PCLK_SRC_MUX		5

#define HDMI_PCLK_SRC			6

#endif