Loading Makefile +5 −1 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0 VERSION = 4 PATCHLEVEL = 19 SUBLEVEL = 284 SUBLEVEL = 285 EXTRAVERSION = NAME = "People's Front" Loading Loading @@ -746,6 +746,10 @@ endif KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) KBUILD_CFLAGS += $(call cc-disable-warning, unused-const-variable) # These result in bogus false positives KBUILD_CFLAGS += $(call cc-disable-warning, dangling-pointer) ifdef CONFIG_FRAME_POINTER KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls else Loading arch/arm/boot/dts/stm32f7-pinctrl.dtsi +82 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,88 @@ slew-rate = <2>; }; }; can1_pins_a: can1-0 { pins1 { pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_b: can1-1 { pins1 { pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_c: can1-2 { pins1 { pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_d: can1-3 { pins1 { pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can2_pins_a: can2-0 { pins1 { pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ bias-pull-up; }; }; can2_pins_b: can2-1 { pins1 { pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ bias-pull-up; }; }; can3_pins_a: can3-0 { pins1 { pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ }; pins2 { pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ bias-pull-up; }; }; can3_pins_b: can3-1 { pins1 { pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ bias-pull-up; }; }; }; }; }; arch/arm/kernel/unwind.c +24 −1 Original line number Diff line number Diff line Loading @@ -313,6 +313,29 @@ static int unwind_exec_pop_subset_r0_to_r3(struct unwind_ctrl_block *ctrl, return URC_OK; } static unsigned long unwind_decode_uleb128(struct unwind_ctrl_block *ctrl) { unsigned long bytes = 0; unsigned long insn; unsigned long result = 0; /* * unwind_get_byte() will advance `ctrl` one instruction at a time, so * loop until we get an instruction byte where bit 7 is not set. * * Note: This decodes a maximum of 4 bytes to output 28 bits data where * max is 0xfffffff: that will cover a vsp increment of 1073742336, hence * it is sufficient for unwinding the stack. */ do { insn = unwind_get_byte(ctrl); result |= (insn & 0x7f) << (bytes * 7); bytes++; } while (!!(insn & 0x80) && (bytes != sizeof(result))); return result; } /* * Execute the current unwind instruction. */ Loading Loading @@ -366,7 +389,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) if (ret) goto error; } else if (insn == 0xb2) { unsigned long uleb128 = unwind_get_byte(ctrl); unsigned long uleb128 = unwind_decode_uleb128(ctrl); ctrl->vrs[SP] += 0x204 + (uleb128 << 2); } else { Loading arch/arm64/mm/fault.c +2 −2 Original line number Diff line number Diff line Loading @@ -389,8 +389,8 @@ static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *re } } #define VM_FAULT_BADMAP 0x010000 #define VM_FAULT_BADACCESS 0x020000 #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000) #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000) static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int mm_flags, unsigned long vm_flags, Loading arch/x86/boot/boot.h +24 −12 Original line number Diff line number Diff line Loading @@ -114,66 +114,78 @@ typedef unsigned int addr_t; static inline u8 rdfs8(addr_t addr) { u8 *ptr = (u8 *)absolute_pointer(addr); u8 v; asm volatile("movb %%fs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); asm volatile("movb %%fs:%1,%0" : "=q" (v) : "m" (*ptr)); return v; } static inline u16 rdfs16(addr_t addr) { u16 *ptr = (u16 *)absolute_pointer(addr); u16 v; asm volatile("movw %%fs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); asm volatile("movw %%fs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline u32 rdfs32(addr_t addr) { u32 *ptr = (u32 *)absolute_pointer(addr); u32 v; asm volatile("movl %%fs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); asm volatile("movl %%fs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline void wrfs8(u8 v, addr_t addr) { asm volatile("movb %1,%%fs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); u8 *ptr = (u8 *)absolute_pointer(addr); asm volatile("movb %1,%%fs:%0" : "+m" (*ptr) : "qi" (v)); } static inline void wrfs16(u16 v, addr_t addr) { asm volatile("movw %1,%%fs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); u16 *ptr = (u16 *)absolute_pointer(addr); asm volatile("movw %1,%%fs:%0" : "+m" (*ptr) : "ri" (v)); } static inline void wrfs32(u32 v, addr_t addr) { asm volatile("movl %1,%%fs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); u32 *ptr = (u32 *)absolute_pointer(addr); asm volatile("movl %1,%%fs:%0" : "+m" (*ptr) : "ri" (v)); } static inline u8 rdgs8(addr_t addr) { u8 *ptr = (u8 *)absolute_pointer(addr); u8 v; asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*ptr)); return v; } static inline u16 rdgs16(addr_t addr) { u16 *ptr = (u16 *)absolute_pointer(addr); u16 v; asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline u32 rdgs32(addr_t addr) { u32 *ptr = (u32 *)absolute_pointer(addr); u32 v; asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline void wrgs8(u8 v, addr_t addr) { asm volatile("movb %1,%%gs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); u8 *ptr = (u8 *)absolute_pointer(addr); asm volatile("movb %1,%%gs:%0" : "+m" (*ptr) : "qi" (v)); } static inline void wrgs16(u16 v, addr_t addr) { asm volatile("movw %1,%%gs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); u16 *ptr = (u16 *)absolute_pointer(addr); asm volatile("movw %1,%%gs:%0" : "+m" (*ptr) : "ri" (v)); } static inline void wrgs32(u32 v, addr_t addr) { asm volatile("movl %1,%%gs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); u32 *ptr = (u32 *)absolute_pointer(addr); asm volatile("movl %1,%%gs:%0" : "+m" (*ptr) : "ri" (v)); } /* Note: these only return true/false, not a signed return value! */ Loading Loading
Makefile +5 −1 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0 VERSION = 4 PATCHLEVEL = 19 SUBLEVEL = 284 SUBLEVEL = 285 EXTRAVERSION = NAME = "People's Front" Loading Loading @@ -746,6 +746,10 @@ endif KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) KBUILD_CFLAGS += $(call cc-disable-warning, unused-const-variable) # These result in bogus false positives KBUILD_CFLAGS += $(call cc-disable-warning, dangling-pointer) ifdef CONFIG_FRAME_POINTER KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls else Loading
arch/arm/boot/dts/stm32f7-pinctrl.dtsi +82 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,88 @@ slew-rate = <2>; }; }; can1_pins_a: can1-0 { pins1 { pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_b: can1-1 { pins1 { pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_c: can1-2 { pins1 { pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can1_pins_d: can1-3 { pins1 { pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ }; pins2 { pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ bias-pull-up; }; }; can2_pins_a: can2-0 { pins1 { pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ bias-pull-up; }; }; can2_pins_b: can2-1 { pins1 { pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ bias-pull-up; }; }; can3_pins_a: can3-0 { pins1 { pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ }; pins2 { pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ bias-pull-up; }; }; can3_pins_b: can3-1 { pins1 { pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ }; pins2 { pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ bias-pull-up; }; }; }; }; };
arch/arm/kernel/unwind.c +24 −1 Original line number Diff line number Diff line Loading @@ -313,6 +313,29 @@ static int unwind_exec_pop_subset_r0_to_r3(struct unwind_ctrl_block *ctrl, return URC_OK; } static unsigned long unwind_decode_uleb128(struct unwind_ctrl_block *ctrl) { unsigned long bytes = 0; unsigned long insn; unsigned long result = 0; /* * unwind_get_byte() will advance `ctrl` one instruction at a time, so * loop until we get an instruction byte where bit 7 is not set. * * Note: This decodes a maximum of 4 bytes to output 28 bits data where * max is 0xfffffff: that will cover a vsp increment of 1073742336, hence * it is sufficient for unwinding the stack. */ do { insn = unwind_get_byte(ctrl); result |= (insn & 0x7f) << (bytes * 7); bytes++; } while (!!(insn & 0x80) && (bytes != sizeof(result))); return result; } /* * Execute the current unwind instruction. */ Loading Loading @@ -366,7 +389,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) if (ret) goto error; } else if (insn == 0xb2) { unsigned long uleb128 = unwind_get_byte(ctrl); unsigned long uleb128 = unwind_decode_uleb128(ctrl); ctrl->vrs[SP] += 0x204 + (uleb128 << 2); } else { Loading
arch/arm64/mm/fault.c +2 −2 Original line number Diff line number Diff line Loading @@ -389,8 +389,8 @@ static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *re } } #define VM_FAULT_BADMAP 0x010000 #define VM_FAULT_BADACCESS 0x020000 #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000) #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000) static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int mm_flags, unsigned long vm_flags, Loading
arch/x86/boot/boot.h +24 −12 Original line number Diff line number Diff line Loading @@ -114,66 +114,78 @@ typedef unsigned int addr_t; static inline u8 rdfs8(addr_t addr) { u8 *ptr = (u8 *)absolute_pointer(addr); u8 v; asm volatile("movb %%fs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); asm volatile("movb %%fs:%1,%0" : "=q" (v) : "m" (*ptr)); return v; } static inline u16 rdfs16(addr_t addr) { u16 *ptr = (u16 *)absolute_pointer(addr); u16 v; asm volatile("movw %%fs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); asm volatile("movw %%fs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline u32 rdfs32(addr_t addr) { u32 *ptr = (u32 *)absolute_pointer(addr); u32 v; asm volatile("movl %%fs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); asm volatile("movl %%fs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline void wrfs8(u8 v, addr_t addr) { asm volatile("movb %1,%%fs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); u8 *ptr = (u8 *)absolute_pointer(addr); asm volatile("movb %1,%%fs:%0" : "+m" (*ptr) : "qi" (v)); } static inline void wrfs16(u16 v, addr_t addr) { asm volatile("movw %1,%%fs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); u16 *ptr = (u16 *)absolute_pointer(addr); asm volatile("movw %1,%%fs:%0" : "+m" (*ptr) : "ri" (v)); } static inline void wrfs32(u32 v, addr_t addr) { asm volatile("movl %1,%%fs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); u32 *ptr = (u32 *)absolute_pointer(addr); asm volatile("movl %1,%%fs:%0" : "+m" (*ptr) : "ri" (v)); } static inline u8 rdgs8(addr_t addr) { u8 *ptr = (u8 *)absolute_pointer(addr); u8 v; asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*ptr)); return v; } static inline u16 rdgs16(addr_t addr) { u16 *ptr = (u16 *)absolute_pointer(addr); u16 v; asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline u32 rdgs32(addr_t addr) { u32 *ptr = (u32 *)absolute_pointer(addr); u32 v; asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*ptr)); return v; } static inline void wrgs8(u8 v, addr_t addr) { asm volatile("movb %1,%%gs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); u8 *ptr = (u8 *)absolute_pointer(addr); asm volatile("movb %1,%%gs:%0" : "+m" (*ptr) : "qi" (v)); } static inline void wrgs16(u16 v, addr_t addr) { asm volatile("movw %1,%%gs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); u16 *ptr = (u16 *)absolute_pointer(addr); asm volatile("movw %1,%%gs:%0" : "+m" (*ptr) : "ri" (v)); } static inline void wrgs32(u32 v, addr_t addr) { asm volatile("movl %1,%%gs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); u32 *ptr = (u32 *)absolute_pointer(addr); asm volatile("movl %1,%%gs:%0" : "+m" (*ptr) : "ri" (v)); } /* Note: these only return true/false, not a signed return value! */ Loading