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Commit cfc65e82 authored by Aditya Bavanari's avatar Aditya Bavanari
Browse files

asoc: codecs: Vote for codec core and NPL clocks before regcache_sync 



Vote for codec core and NPL clocks before regcache_sync
to avoid unclocked access of bolero registers.
Unvote once the regcache sync is done.

Change-Id: Iae45f487113c55318f33cd1950e2d6b64bcd945a
Signed-off-by: default avatarAditya Bavanari <abavanar@codeaurora.org>
parent ae5dca48

asoc/codecs/bolero/bolero-cdc.c

+4 −0
Original line number Diff line number Diff line
@@ -661,7 +661,11 @@ static int bolero_ssr_enable(struct device *dev, void *data) 
	priv->dev_up = true;

	mutex_unlock(&priv->clk_lock);

	regcache_mark_dirty(priv->regmap);

	bolero_clk_rsc_enable_all_clocks(priv->clk_dev, true);

	regcache_sync(priv->regmap);

	/* Add a 100usec sleep to ensure last register write is done */

	usleep_range(100,110);

	bolero_clk_rsc_enable_all_clocks(priv->clk_dev, false);

	/* call ssr event for supported macros */

	for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {

		if (!priv->macro_params[macro_idx].event_handler)

asoc/codecs/bolero/bolero-clk-rsc.c

+43 −0
Original line number Diff line number Diff line
@@ -137,6 +137,49 @@ int bolero_rsc_clk_reset(struct device *dev, int clk_id) 
}

EXPORT_SYMBOL(bolero_rsc_clk_reset);



void bolero_clk_rsc_enable_all_clocks(struct device *dev, bool enable)

{

	struct device *clk_dev = NULL;

	struct bolero_clk_rsc *priv = NULL;

	int i = 0;



	if (!dev) {

		pr_err("%s: dev is null %d\n", __func__);

		return;

	}



	clk_dev = bolero_get_rsc_clk_device_ptr(dev->parent);

	if (!clk_dev) {

		pr_err("%s: Invalid rsc clk device\n", __func__);

		return;

	}



	priv = dev_get_drvdata(clk_dev);

	if (!priv) {

		pr_err("%s: Invalid rsc clk private data\n", __func__);

		return;

	}

	mutex_lock(&priv->rsc_clk_lock);

	for (i = 0; i < MAX_CLK - NPL_CLK_OFFSET; i++) {

		if (enable) {

			if (priv->clk[i])

				clk_prepare_enable(priv->clk[i]);

			if (priv->clk[i + NPL_CLK_OFFSET])

				clk_prepare_enable(

					priv->clk[i + NPL_CLK_OFFSET]);

		} else {

			if (priv->clk[i + NPL_CLK_OFFSET])

				clk_disable_unprepare(

					priv->clk[i + NPL_CLK_OFFSET]);

			if (priv->clk[i])

				clk_disable_unprepare(priv->clk[i]);

		}

	}

	mutex_unlock(&priv->rsc_clk_lock);

	return;

}

EXPORT_SYMBOL(bolero_clk_rsc_enable_all_clocks);



static int bolero_clk_rsc_mux0_clk_request(struct bolero_clk_rsc *priv,

					   int clk_id,

					   bool enable)

asoc/codecs/bolero/bolero-clk-rsc.h

+6 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ int bolero_clk_rsc_request_clock(struct device *dev, 
				int clk_id_req,

				bool enable);

int bolero_rsc_clk_reset(struct device *dev, int clk_id);

void bolero_clk_rsc_enable_all_clocks(struct device *dev, bool enable);

#else

static inline void bolero_clk_rsc_fs_gen_request(struct device *dev,

						bool enable)
@@ -42,5 +43,10 @@ static inline int bolero_rsc_clk_reset(struct device *dev, int clk_id) 
{

	return 0;

}

static inline void bolero_clk_rsc_enable_all_clocks(struct device *dev,

						    bool enable)

{

	return;

}

#endif /* CONFIG_SND_SOC_BOLERO */

#endif /* BOLERO_CLK_RSC_H */