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Commit cfc3d6c4 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

Merge branch 'topic/r820t' into patchwork 

* topic/r820t: (31 commits)
  [media] r820t: Don't divide the IF by two
  [media] r820t: disable auto gain/VGA setting
  [media] rtl2832: Fix IF calculus
  [media] r820t: put it into automatic gain mode
  [media] r820t: Fix hp_cor filter mask
  [media] r820t: fix PLL calculus
  [media] r820t: Don't put it in standby if not initialized yet
  [media] r820t: avoid rewrite all regs when not needed
  [media] r820t: Allow disabling IMR callibration
  [media] r820t: add a commented code for GPIO
  [media] r820t: add IMR calibrate code
  [media] r820t: proper initialize the PLL register
  [media] r820t: use usleep_range()
  [media] r820t: fix prefix of the r820t_read() function
  [media] r820t: split the function that read cached regs
  [media] r820t: better report signal strength
  [media] r820t: add support for diplexer
  [media] r820t: Show the read data in the bit-reversed order
  [media] r820t: use the second table for 7MHz
  [media] r820t: Invert bits for read ops
  ...
parents 542b329f 396f3659

drivers/media/dvb-frontends/rtl2832.c

+65 −20
Original line number Diff line number Diff line
@@ -380,13 +380,41 @@ static int rtl2832_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 
	return ret;

}



static int rtl2832_init(struct dvb_frontend *fe)



static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)

{

	struct rtl2832_priv *priv = fe->demodulator_priv;

	int i, ret, len;

	u8 en_bbin;

	int ret;

	u64 pset_iffreq;

	u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);



	/*

	* PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)

	*		/ CrystalFreqHz)

	*/



	pset_iffreq = if_freq % priv->cfg.xtal;

	pset_iffreq *= 0x400000;

	pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);

	pset_iffreq = -pset_iffreq;

	pset_iffreq = pset_iffreq & 0x3fffff;

	dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d pset_iffreq=%08x\n",

			__func__, if_freq, (unsigned)pset_iffreq);



	ret = rtl2832_wr_demod_reg(priv, DVBT_EN_BBIN, en_bbin);

	if (ret)

		return ret;



	ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);



	return (ret);

}



static int rtl2832_init(struct dvb_frontend *fe)

{

	struct rtl2832_priv *priv = fe->demodulator_priv;

	const struct rtl2832_reg_value *init;

	int i, ret, len;



	/* initialization values for the demodulator registers */

	struct rtl2832_reg_value rtl2832_initial_regs[] = {
@@ -432,22 +460,10 @@ static int rtl2832_init(struct dvb_frontend *fe) 
		{DVBT_TR_THD_SET2,		0x6},

		{DVBT_TRK_KC_I2,		0x5},

		{DVBT_CR_THD_SET2,		0x1},

		{DVBT_SPEC_INV,			0x0},

	};



	dev_dbg(&priv->i2c->dev, "%s:\n", __func__);



	en_bbin = (priv->cfg.if_dvbt == 0 ? 0x1 : 0x0);



	/*

	* PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)

	*		/ CrystalFreqHz)

	*/

	pset_iffreq = priv->cfg.if_dvbt % priv->cfg.xtal;

	pset_iffreq *= 0x400000;

	pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);

	pset_iffreq = pset_iffreq & 0x3fffff;



	for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {

		ret = rtl2832_wr_demod_reg(priv, rtl2832_initial_regs[i].reg,

			rtl2832_initial_regs[i].value);
@@ -472,6 +488,10 @@ static int rtl2832_init(struct dvb_frontend *fe) 
		len = ARRAY_SIZE(rtl2832_tuner_init_e4000);

		init = rtl2832_tuner_init_e4000;

		break;

	case RTL2832_TUNER_R820T:

		len = ARRAY_SIZE(rtl2832_tuner_init_r820t);

		init = rtl2832_tuner_init_r820t;

		break;

	default:

		ret = -EINVAL;

		goto err;
@@ -483,15 +503,27 @@ static int rtl2832_init(struct dvb_frontend *fe) 
			goto err;

	}



	/* if frequency settings */

	ret = rtl2832_wr_demod_reg(priv, DVBT_EN_BBIN, en_bbin);

	if (!fe->ops.tuner_ops.get_if_frequency) {

		ret = rtl2832_set_if(fe, priv->cfg.if_dvbt);

		if (ret)

			goto err;

	}



	ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);

	/*

	 * r820t NIM code does a software reset here at the demod -

	 * may not be needed, as there's already a software reset at set_params()

	 */

#if 1

	/* soft reset */

	ret = rtl2832_wr_demod_reg(priv, DVBT_SOFT_RST, 0x1);

	if (ret)

		goto err;



	ret = rtl2832_wr_demod_reg(priv, DVBT_SOFT_RST, 0x0);

	if (ret)

		goto err;

#endif



	priv->sleeping = false;



	return ret;
@@ -564,6 +596,19 @@ static int rtl2832_set_frontend(struct dvb_frontend *fe) 
	if (fe->ops.tuner_ops.set_params)

		fe->ops.tuner_ops.set_params(fe);



	/* If the frontend has get_if_frequency(), use it */

	if (fe->ops.tuner_ops.get_if_frequency) {

		u32 if_freq;



		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);

		if (ret)

			goto err;



		ret = rtl2832_set_if(fe, if_freq);

		if (ret)

			goto err;

	}



	switch (c->bandwidth_hz) {

	case 6000000:

		i = 0;

drivers/media/dvb-frontends/rtl2832.h

+1 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ struct rtl2832_config { 
#define RTL2832_TUNER_FC0012    0x26

#define RTL2832_TUNER_E4000     0x27

#define RTL2832_TUNER_FC0013    0x29

#define RTL2832_TUNER_R820T	0x2a

	u8 tuner;

};

drivers/media/dvb-frontends/rtl2832_priv.h

+28 −0
Original line number Diff line number Diff line
@@ -267,6 +267,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = { 
	{DVBT_OPT_ADC_IQ,                0x1},

	{DVBT_AD_AVI,                    0x0},

	{DVBT_AD_AVQ,                    0x0},

	{DVBT_SPEC_INV,			 0x0},

};



static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
@@ -300,6 +301,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = { 
	{DVBT_GI_PGA_STATE,              0x0},

	{DVBT_EN_AGC_PGA,                0x1},

	{DVBT_IF_AGC_MAN,                0x0},

	{DVBT_SPEC_INV,			 0x0},

};



static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
@@ -337,6 +339,32 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = { 
	{DVBT_REG_MONSEL,                0x1},

	{DVBT_REG_MON,                   0x1},

	{DVBT_REG_4MSEL,                 0x0},

	{DVBT_SPEC_INV,			 0x0},

};



static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {

	{DVBT_DAGC_TRG_VAL,		0x39},

	{DVBT_AGC_TARG_VAL_0,		0x0},

	{DVBT_AGC_TARG_VAL_8_1,		0x40},

	{DVBT_AAGC_LOOP_GAIN,		0x16},

	{DVBT_LOOP_GAIN2_3_0,		0x8},

	{DVBT_LOOP_GAIN2_4,		0x1},

	{DVBT_LOOP_GAIN3,		0x18},

	{DVBT_VTOP1,			0x35},

	{DVBT_VTOP2,			0x21},

	{DVBT_VTOP3,			0x21},

	{DVBT_KRF1,			0x0},

	{DVBT_KRF2,			0x40},

	{DVBT_KRF3,			0x10},

	{DVBT_KRF4,			0x10},

	{DVBT_IF_AGC_MIN,		0x80},

	{DVBT_IF_AGC_MAX,		0x7f},

	{DVBT_RF_AGC_MIN,		0x80},

	{DVBT_RF_AGC_MAX,		0x7f},

	{DVBT_POLAR_RF_AGC,		0x0},

	{DVBT_POLAR_IF_AGC,		0x0},

	{DVBT_AD7_SETTING,		0xe9f4},

	{DVBT_SPEC_INV,			0x1},

};



#endif /* RTL2832_PRIV_H */

drivers/media/tuners/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -248,4 +248,11 @@ config MEDIA_TUNER_IT913X 
	default m if !MEDIA_SUBDRV_AUTOSELECT

	help

	  ITE Tech IT913x silicon tuner driver.



config MEDIA_TUNER_R820T

	tristate "Rafael Micro R820T silicon tuner"

	depends on MEDIA_SUPPORT && I2C

	default m if !MEDIA_SUBDRV_AUTOSELECT

	help

	  Rafael Micro R820T silicon tuner driver.

endmenu

drivers/media/tuners/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ obj-$(CONFIG_MEDIA_TUNER_FC0011) += fc0011.o 
obj-$(CONFIG_MEDIA_TUNER_FC0012) += fc0012.o

obj-$(CONFIG_MEDIA_TUNER_FC0013) += fc0013.o

obj-$(CONFIG_MEDIA_TUNER_IT913X) += tuner_it913x.o

obj-$(CONFIG_MEDIA_TUNER_R820T) += r820t.o



ccflags-y += -I$(srctree)/drivers/media/dvb-core

ccflags-y += -I$(srctree)/drivers/media/dvb-frontends