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Commit cf16d76c authored by Sujeev Dias's avatar Sujeev Dias Committed by Gerrit - the friendly Code Review server
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mhi: core: fix iterating through misc offset for capabilities



Iterating through capabilities from MHI MISC offset registers
should be done in a way that the next offset can be directly
used.

CRs-Fixed: 2506085
Change-Id: I66b3d8b627a96d065b6eb30c1d0a21819d11c980
Acked-by: default avatarBhaumik Vasav Bhatt <bbhatt@qti.qualcomm.com>
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent f42a458e
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+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ extern struct bus_type mhi_bus_type;

/* MHI mmio register mapping */
#define PCI_INVALID_READ(val) (val == U32_MAX)
#define MHI_REG_SIZE (SZ_4K)

#define MHIREGLEN (0x0)
#define MHIREGLEN_MHIREGLEN_MASK (0xFFFFFFFF)
+3 −1
Original line number Diff line number Diff line
@@ -81,7 +81,9 @@ int mhi_get_capability_offset(struct mhi_controller *mhi_cntrl,
		if (ret)
			return ret;

		*offset += next_offset;
		*offset = next_offset;
		if (*offset >= MHI_REG_SIZE)
			return -ENXIO;
	} while (next_offset);

	return -ENXIO;