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Commit ce11ce17 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

e752x_edac: convert driver to use the new edac ABI 



The legacy edac ABI is going to be removed. Port the driver to use
and benefit from the new API functionality.

Cc: Mark Gross <mark.gross@intel.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent df62b1e6

drivers/edac/e752x_edac.c

+34 −15
Original line number Original line Diff line number Diff line
@@ -6,6 +6,9 @@ 
 *

 *

 * See "enum e752x_chips" below for supported chipsets

 * See "enum e752x_chips" below for supported chipsets

 *

 *

 * Datasheet:

 *	http://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html

 *

 * Written by Tom Zimmerman

 * Written by Tom Zimmerman

 *

 *

 * Contributors:

 * Contributors:
@@ -350,8 +353,10 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one, 
	channel = !(error_one & 1);

	channel = !(error_one & 1);





	/* e752x mc reads 34:6 of the DRAM linear address */

	/* e752x mc reads 34:6 of the DRAM linear address */

	edac_mc_handle_ce(mci, page, offset_in_page(sec1_add << 4),

	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,

			sec1_syndrome, row, channel, "e752x CE");

			     page, offset_in_page(sec1_add << 4), sec1_syndrome,

			     row, channel, -1,

			     "e752x CE", "", NULL);

}

}





static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,

static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
@@ -385,9 +390,12 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, 
			edac_mc_find_csrow_by_page(mci, block_page);

			edac_mc_find_csrow_by_page(mci, block_page);





		/* e752x mc reads 34:6 of the DRAM linear address */

		/* e752x mc reads 34:6 of the DRAM linear address */

		edac_mc_handle_ue(mci, block_page,

		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,

				offset_in_page(error_2b << 4),

					block_page,

				row, "e752x UE from Read");

					offset_in_page(error_2b << 4), 0,

					 row, -1, -1,

					"e752x UE from Read", "", NULL);



	}

	}

	if (error_one & 0x0404) {

	if (error_one & 0x0404) {

		error_2b = scrb_add;

		error_2b = scrb_add;
@@ -401,9 +409,11 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, 
			edac_mc_find_csrow_by_page(mci, block_page);

			edac_mc_find_csrow_by_page(mci, block_page);





		/* e752x mc reads 34:6 of the DRAM linear address */

		/* e752x mc reads 34:6 of the DRAM linear address */

		edac_mc_handle_ue(mci, block_page,

		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,

				offset_in_page(error_2b << 4),

					block_page,

				row, "e752x UE from Scruber");

					offset_in_page(error_2b << 4), 0,

					row, -1, -1,

					"e752x UE from Scruber", "", NULL);

	}

	}

}

}
@@ -426,7 +436,9 @@ static inline void process_ue_no_info_wr(struct mem_ctl_info *mci, 
		return;

		return;





	debugf3("%s()\n", __func__);

	debugf3("%s()\n", __func__);

	edac_mc_handle_ue_no_info(mci, "e752x UE log memory write");

	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,

			     -1, -1, -1,

			     "e752x UE log memory write", "", NULL);

}

}





static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,

static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,
@@ -1081,10 +1093,11 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, 
		nr_pages = cumul_size - last_cumul_size;

		nr_pages = cumul_size - last_cumul_size;

		last_cumul_size = cumul_size;

		last_cumul_size = cumul_size;





		for (i = 0; i < drc_chan + 1; i++) {

		for (i = 0; i < csrow->nr_channels; i++) {

			struct dimm_info *dimm = csrow->channels[i].dimm;

			struct dimm_info *dimm = csrow->channels[i].dimm;





			dimm->nr_pages = nr_pages / (drc_chan + 1);

			debugf3("Initializing rank at (%i,%i)\n", index, i);

			dimm->nr_pages = nr_pages / csrow->nr_channels;

			dimm->grain = 1 << 12;	/* 4KiB - resolution of CELOG */

			dimm->grain = 1 << 12;	/* 4KiB - resolution of CELOG */

			dimm->mtype = MEM_RDDR;	/* only one type supported */

			dimm->mtype = MEM_RDDR;	/* only one type supported */

			dimm->dtype = mem_dev ? DEV_X4 : DEV_X8;

			dimm->dtype = mem_dev ? DEV_X4 : DEV_X8;
@@ -1232,6 +1245,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) 
	u16 pci_data;

	u16 pci_data;

	u8 stat8;

	u8 stat8;

	struct mem_ctl_info *mci;

	struct mem_ctl_info *mci;

	struct edac_mc_layer layers[2];

	struct e752x_pvt *pvt;

	struct e752x_pvt *pvt;

	u16 ddrcsr;

	u16 ddrcsr;

	int drc_chan;		/* Number of channels 0=1chan,1=2chan */

	int drc_chan;		/* Number of channels 0=1chan,1=2chan */
@@ -1258,11 +1272,16 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) 
	/* Dual channel = 1, Single channel = 0 */

	/* Dual channel = 1, Single channel = 0 */

	drc_chan = dual_channel_active(ddrcsr);

	drc_chan = dual_channel_active(ddrcsr);





	mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1, 0);

	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;



	layers[0].size = E752X_NR_CSROWS;

	if (mci == NULL) {

	layers[0].is_virt_csrow = true;

	layers[1].type = EDAC_MC_LAYER_CHANNEL;

	layers[1].size = drc_chan + 1;

	layers[1].is_virt_csrow = false;

	mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers,

			    sizeof(*pvt));

	if (mci == NULL)

		return -ENOMEM;

		return -ENOMEM;

	}





	debugf3("%s(): init mci\n", __func__);

	debugf3("%s(): init mci\n", __func__);

	mci->mtype_cap = MEM_FLAG_RDDR;

	mci->mtype_cap = MEM_FLAG_RDDR;