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Commit cd702b8d authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm: fix watchdog vsync source for dsi display 



Commit 483d9364 ("drm/msm: update sde rsc support
with wd vsync") updated watchdog vsync source based
on recommended register programming. The register
programming recommendation is changed and this patch
fixes the vsync source based on new recommended
values.

Change-Id: I99abc09f1ef0ff5b39759b45a06245343f8d1aaa
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 8960e2bd

drivers/gpu/drm/msm/sde/sde_hw_mdss.h

+5 −5
Original line number Diff line number Diff line
@@ -85,11 +85,11 @@ enum sde_format_flags { 
#define SDE_VSYNC_SOURCE_INTF_1		4

#define SDE_VSYNC_SOURCE_INTF_2		5

#define SDE_VSYNC_SOURCE_INTF_3		6

#define SDE_VSYNC_SOURCE_WD_TIMER_4	0x11

#define SDE_VSYNC_SOURCE_WD_TIMER_3	0x12

#define SDE_VSYNC_SOURCE_WD_TIMER_2	0x13

#define SDE_VSYNC_SOURCE_WD_TIMER_1	0x14

#define SDE_VSYNC_SOURCE_WD_TIMER_0	0x15

#define SDE_VSYNC_SOURCE_WD_TIMER_4	11

#define SDE_VSYNC_SOURCE_WD_TIMER_3	12

#define SDE_VSYNC_SOURCE_WD_TIMER_2	13

#define SDE_VSYNC_SOURCE_WD_TIMER_1	14

#define SDE_VSYNC_SOURCE_WD_TIMER_0	15



enum sde_hw_blk_type {

	SDE_HW_BLK_TOP = 0,