Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cd586ebc authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
Browse files

MIPS: BMIPS: Refresh BCM3384 DTS files 



The DT bindings for this platform have changed as the bootloader and
product requirements evolved.  In particular, there are both
Linux-on-Zephyr and Linux-on-Viper configurations.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8856/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 60b858f2

arch/mips/boot/dts/brcm/bcm3384.dtsi

deleted100644 → 0
+0 −109
Original line number Diff line number Diff line 
/ {

	#address-cells = <1>;

	#size-cells = <1>;

	compatible = "brcm,bcm3384", "brcm,bcm33843";



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		/* On BMIPS5000 this is 1/8th of the CPU core clock */

		mips-hpt-frequency = <100000000>;



		cpu@0 {

			compatible = "brcm,bmips5000";

			device_type = "cpu";

			reg = <0>;

		};



		cpu@1 {

			compatible = "brcm,bmips5000";

			device_type = "cpu";

			reg = <1>;

		};

	};



	clocks {

		#address-cells = <1>;

		#size-cells = <0>;



		periph_clk: periph_clk@0 {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <54000000>;

		};

	};



	aliases {

		uart0 = &uart0;

	};



	cpu_intc: cpu_intc@0 {

		#address-cells = <0>;

		compatible = "mti,cpu-interrupt-controller";



		interrupt-controller;

		#interrupt-cells = <1>;

	};



	periph_intc: periph_intc@14e00038 {

		compatible = "brcm,bcm3384-intc";

		reg = <0x14e00038 0x8 0x14e00340 0x8>;



		interrupt-controller;

		#interrupt-cells = <1>;



		interrupt-parent = <&cpu_intc>;

		interrupts = <4>;

	};



	zmips_intc: zmips_intc@104b0060 {

		compatible = "brcm,bcm3384-intc";

		reg = <0x104b0060 0x8>;



		interrupt-controller;

		#interrupt-cells = <1>;



		interrupt-parent = <&periph_intc>;

		interrupts = <29>;

	};



	iop_intc: iop_intc@14e00058 {

		compatible = "brcm,bcm3384-intc";

		reg = <0x14e00058 0x8>;



		interrupt-controller;

		#interrupt-cells = <1>;



		interrupt-parent = <&cpu_intc>;

		interrupts = <6>;

	};



	uart0: serial@14e00520 {

		compatible = "brcm,bcm6345-uart";

		reg = <0x14e00520 0x18>;

		interrupt-parent = <&periph_intc>;

		interrupts = <2>;

		clocks = <&periph_clk>;

		status = "disabled";

	};



	ehci0: usb@15400300 {

		compatible = "brcm,bcm3384-ehci", "generic-ehci";

		reg = <0x15400300 0x100>;

		big-endian;

		interrupt-parent = <&periph_intc>;

		interrupts = <41>;

		status = "disabled";

	};



	ohci0: usb@15400400 {

		compatible = "brcm,bcm3384-ohci", "generic-ohci";

		reg = <0x15400400 0x100>;

		big-endian;

		no-big-frame-no;

		interrupt-parent = <&periph_intc>;

		interrupts = <40>;

		status = "disabled";

	};

};

arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi

0 → 100644
+126 −0
Original line number Diff line number Diff line 
/ {

	#address-cells = <1>;

	#size-cells = <1>;

	compatible = "brcm,bcm3384", "brcm,bcm33843";



	memory@0 {

		device_type = "memory";



		/* Typical range.  The bootloader should fill this in. */

		reg = <0x0 0x08000000>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		/* On BMIPS5000 this is 1/8th of the CPU core clock */

		mips-hpt-frequency = <100000000>;



		cpu@0 {

			compatible = "brcm,bmips5000";

			device_type = "cpu";

			reg = <0>;

		};



		cpu@1 {

			compatible = "brcm,bmips5000";

			device_type = "cpu";

			reg = <1>;

		};

	};



	cpu_intc: cpu_intc {

		#address-cells = <0>;

		compatible = "mti,cpu-interrupt-controller";



		interrupt-controller;

		#interrupt-cells = <1>;

	};



	clocks {

		periph_clk: periph_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <54000000>;

		};

	};



	aliases {

		uart0 = &uart0;

	};



	ubus {

		#address-cells = <1>;

		#size-cells = <1>;



		compatible = "brcm,ubus", "simple-bus";

		ranges;

		dma-ranges = <0x00000000 0x08000000 0x08000000>,

			     <0x08000000 0x00000000 0x08000000>;



		periph_intc: periph_intc@14e00038 {

			compatible = "brcm,bcm3380-l2-intc";

			reg = <0x14e00038 0x4 0x14e0003c 0x4>,

			      <0x14e00340 0x4 0x14e00344 0x4>;



			interrupt-controller;

			#interrupt-cells = <1>;



			interrupt-parent = <&cpu_intc>;

			interrupts = <4>;

		};



		zmips_intc: zmips_intc@104b0060 {

			compatible = "brcm,bcm3380-l2-intc";

			reg = <0x104b0060 0x4 0x104b0064 0x4>;



			interrupt-controller;

			#interrupt-cells = <1>;



			interrupt-parent = <&periph_intc>;

			interrupts = <29>;

			brcm,int-map-mask = <0xffffffff>;

		};



		iop_intc: iop_intc@14e00058 {

			compatible = "brcm,bcm3380-l2-intc";

			reg = <0x14e00058 0x4 0x14e0005c 0x4>;



			interrupt-controller;

			#interrupt-cells = <1>;



			interrupt-parent = <&cpu_intc>;

			interrupts = <6>;

			brcm,int-map-mask = <0xffffffff>;

		};



		uart0: serial@14e00520 {

			compatible = "brcm,bcm6345-uart";

			reg = <0x14e00520 0x18>;

			interrupt-parent = <&periph_intc>;

			interrupts = <2>;

			clocks = <&periph_clk>;

			status = "disabled";

		};



		ehci0: usb@15400300 {

			compatible = "brcm,bcm3384-ehci", "generic-ehci";

			reg = <0x15400300 0x100>;

			big-endian;

			interrupt-parent = <&periph_intc>;

			interrupts = <41>;

			status = "disabled";

		};



		ohci0: usb@15400400 {

			compatible = "brcm,bcm3384-ohci", "generic-ohci";

			reg = <0x15400400 0x100>;

			big-endian;

			no-big-frame-no;

			interrupt-parent = <&periph_intc>;

			interrupts = <40>;

			status = "disabled";

		};

	};

};

arch/mips/boot/dts/brcm/bcm93384wvg.dts

+1 −8
Original line number Diff line number Diff line 
/dts-v1/;



/include/ "bcm3384.dtsi"

/include/ "bcm3384_zephyr.dtsi"



/ {

	compatible = "brcm,bcm93384wvg", "brcm,bcm3384";
@@ -10,13 +10,6 @@ 
		bootargs = "console=ttyS0,115200";

		stdout-path = &uart0;

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0 0x04000000>;

		dma-xor-mask = <0x08000000>;

		dma-xor-limit = <0x0fffffff>;

	};

};



&uart0 {