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Commit cbfb9620 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "timer: Add a global deferrable timer"

parents 53f1f74d a45c402c
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+2 −0
Original line number Diff line number Diff line
@@ -172,6 +172,8 @@ extern void add_timer(struct timer_list *timer);

extern int try_to_del_timer_sync(struct timer_list *timer);

extern struct timer_base timer_base_deferrable;

#ifdef CONFIG_SMP
  extern int del_timer_sync(struct timer_list *timer);
#else
+14 −5
Original line number Diff line number Diff line
@@ -207,6 +207,7 @@ struct timer_base {
} ____cacheline_aligned;

static DEFINE_PER_CPU(struct timer_base, timer_bases[NR_BASES]);
struct timer_base timer_base_deferrable;

#ifdef CONFIG_NO_HZ_COMMON

@@ -843,8 +844,11 @@ static inline struct timer_base *get_timer_cpu_base(u32 tflags, u32 cpu)
	 * If the timer is deferrable and NO_HZ_COMMON is set then we need
	 * to use the deferrable base.
	 */
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && (tflags & TIMER_DEFERRABLE))
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && (tflags & TIMER_DEFERRABLE)) {
		base = &timer_base_deferrable;
		if (tflags & TIMER_PINNED)
			base = per_cpu_ptr(&timer_bases[BASE_DEF], cpu);
	}
	return base;
}

@@ -856,8 +860,11 @@ static inline struct timer_base *get_timer_this_cpu_base(u32 tflags)
	 * If the timer is deferrable and NO_HZ_COMMON is set then we need
	 * to use the deferrable base.
	 */
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && (tflags & TIMER_DEFERRABLE))
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && (tflags & TIMER_DEFERRABLE)) {
		base = &timer_base_deferrable;
		if (tflags & TIMER_PINNED)
			base = this_cpu_ptr(&timer_bases[BASE_DEF]);
	}
	return base;
}

@@ -1690,9 +1697,11 @@ static __latent_entropy void run_timer_softirq(struct softirq_action *h)
	base->must_forward_clk = false;

	__run_timers(base);
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON))
	if (IS_ENABLED(CONFIG_NO_HZ_COMMON)) {
		__run_timers(&timer_base_deferrable);
		__run_timers(this_cpu_ptr(&timer_bases[BASE_DEF]));
	}
}

/*
 * Called by the local, per-CPU timer interrupt on SMP.