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Commit cbb45093 authored by Benoît Thébaudeau's avatar Benoît Thébaudeau Committed by Ulf Hansson
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mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR 



The eSDHC can only DMA from 32-bit-aligned addresses.

This fixes the following test cases of mmc_test:
  11:	Badly aligned write
  12:	Badly aligned read
  13:	Badly aligned multi-block write
  14:	Badly aligned multi-block read

Signed-off-by: default avatarBenoît Thébaudeau <benoit@wsystem.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent d04f8d5b

drivers/mmc/host/sdhci-esdhc.h

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
 */



#define ESDHC_DEFAULT_QUIRKS	(SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \

				SDHCI_QUIRK_32BIT_DMA_ADDR | \

				SDHCI_QUIRK_NO_BUSY_IRQ | \

				SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \

				SDHCI_QUIRK_PIO_NEEDS_DELAY | \